Grid synchronization for power converters
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Transcript Grid synchronization for power converters
Grid synchronization for power converters
Grid synchronization for power
converters
Marco Liserre
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Marco Liserre
[email protected]
Grid synchronization for power converters
Outline
•
•
•
•
Grid requirements for DG inverters
PLL Basics, PLL in power systems
Design of PLL
PLL for single-phase systems
– Methods to create the orthogonal component
– Methods using adaptive filters
• PLL for three-phase systems
• Conclusions
• Reference papers
Marco Liserre
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Grid synchronization for power converters
Grid
Distrurbances
Grid disturbances are not
at all a new issue, and
the utilities are aware of
them. However, they
have to take a new look
because of the rapidly
changing customers’
needs and the nature of
loads (CIGRE WG14-31,
1999)
Thomsen,1999; CIGRE WG14-31, 1999
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Grid synchronization for power converters
Grid requirements for DG inverters
The following conditions should be met, with voltages in RMS and
measured at the point of utility connection.
When the utility frequency is outside the range of +/- 1 Hz the inverter
should cease to energize the utility line within 0.2 seconds.
The PV system shall have an average lagging power factor greater
than 0,9 when the output is greater than 50% rated.
Thus the grid voltage and frequency should be
estimated and monitored fast and accurate enough in
order to cope with the standard
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Grid synchronization for power converters
Grid synchronization requirements
A good synchronization of the current with the grid voltage is
necessary as:
the standards require a high power factor (> 0.9)
a ”clean” reference for the current is necesarry in order to cope with the
harmonic requirements of grid standards and codes
grid connection transients needs to be minimized in order not to trip the
inverter
Distributed Generation systems of higher power have also requirements in
terms of voltage support or reactive power injection capability and of
frequency support or active power droop
Micro-grid distributed generation systems have wider range of voltage and
frequency and the estimated grid voltage parameters are often involved in
control loops
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Grid synchronization for power converters
Grid synchronization options and challenges
There are two basical synchronization methods:
Filtered Zero Cross Detection (ZCD)
PLL
Single-phase systems:
The classical solution for single-phase systems was Filtered ZCD as for the PLL
two orthogonal voltages are required.
The trend now is to use the PLL technique also by creating ”virtual”
orthogonal components using different techniques!
Three-phase systems:
Three-phase PLL should deal with unbalnace hence with negative sequence
Moreover in three-phase systems dynamics would be better if synchronizing
to all three phase voltages, i.e. based on space vectors rather then on a scalar
voltage
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Grid synchronization for power converters
Zero Cross Detection (ZCD) circuits
Dual point interpolation circuit
Resistive feedback hysteresis
circuit
Dynamic hysteresis comparator
circuit
Source: R.W. Wall, “Simple methods for detecting
zero crossing,” IEEE IECON’03, pp. 2477-2481
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Grid synchronization for power converters
Filtered Zero Cross Detection (ZCD) based
monitoring and synchronization
v
v fil
uk
T
RST
v
Filter
v fil
2
x
1
2
f
f min
Vmax
x
2
dt
RMS CALC
sin
I
ZCD
f max
1
T
V
Vmin
I
Vmax
V
f max
f min
f
OF/UF
TRIP
Vmin
OV/UV
Filtering introduces delay. There are digital predictive FIR filters without
delay bu with high complexity (very high order!)
The RMS voltage and frequency are calculated once in a period poor
detection of changes (sags, dips, etc.)
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Grid synchronization for power converters
PLL basis
Basic idea of synchronization based on a phase-locked loop:
Phase-locked technology is broadly used in military, aerospace, consumer electronics systems
where some kind of feedback is used to synchronize some local periodic event with some
recognizable external event
Many biological processes are synchronized to environmental events. Actually, most of us
schedule our daily activities phase-locking timing information supplied by a clock.
A grid connected power converter should phase-lock its internal oscillator to the grid voltage
(or current), i.e., an amplitude and phase coherent internal signal should be generated.
200
v [V]
100
0
v
in
-100
-200
Event based synchronization
(simple, discontinuous, …)
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Phase-locked synchronization
(continuous, predictive,…)
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Grid synchronization for power converters
PLL basis
Basic blocks:
Phase Detector (PD). This block generates an output signal proportional to the phase
difference between its two input signals. Depending on the type of PD, high frequency ac
components appear together the dc phase difference signal.
Loop Filter (LF). This block exhibits low pass characteristic and filters out the high frequency ac
components from the PD output. Typically this is a 1-st order LPF or PI controller.
Voltage Controlled Oscillator (VCO). This block generates at its output an ac signal whose
frequency varies respect a central frequency as a function of the input voltage.
v
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Phase
Detector
vd
Loop
Filter
vf
Voltage
Controlled
Oscillator
v
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Grid synchronization for power converters
PLL in power systems
In 1968 Ainsworth proposed to use a voltage
controlled oscillator (VCO) inside the control loop
of a High Voltage Direct Current (HVDC)
transmission system to deal with the novel, at that
T1
time, harmonic instability problem.
LS
ia
va
RL
T3
LL
T5
vb
vdc
E
+
-
vc
Subsequently, analog phase locked
loops (PLL) were proposed to be used as
measurement blocks, which provide frequency
adaptation in motor drives.
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T4
T6
T2
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Grid synchronization for power converters
Phase Locked Loop tuning
PD
A sin int in
LF
kd
vd
k p ki
se
VCO
cos( x)
ko
c
vin A sin ωint in
Reference:
vVCO cos ωct out
VCO output:
c t ko se dt out ko se dt
VCO angle:
Small signal
analysis:
PD/Mixer output: vd Akd sin ωint in cos ωct out
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Akd
sin 2int in out sin in out ,
2
Akd
sin 2 int , in in out
v
sin in out in out
d
2
vd
if
ωc in, then
if
in out, then
The average value is
Akd
sin in c t in out sin in c t in out
2
vd
Akd
in out
2
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Grid synchronization for power converters
Phase Locked Loop tuning
assuming
LF - HPI
PD
in
km
vd
1 se
k p 1
Ti s
ko 1
VCO
ko
1
s
out
that can be written as
ts
then
H (s)
out ( s)
2n s n2
H ( s)
in ( s) s 2 2n s n2
km 1
out ( s)
in ( s)
with
n
kps
s2 k p s
kp
Ti
kp
Ti
;
kp
Ti
k pTi
2
4.6
n
The PLL can be tuned as function of the
damping and of the settling time
ts 2
9.2
kp
; Ti
ts
2.3
tr
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1.8
n
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Grid synchronization for power converters
Key parameters of the PLL
The hold range DH is the frequency range at which a PLL is able to maintain lock statically.
DH ko km LF (0)
For the PI, LF(0)=∞ and the hold range is only limited by the frequency range of the VCO
The pull-in range DP is the frequency range at which a PLL will always became locked, but
the process can become rather slow. For the PI loop filter this range trends to infinite.
400
Pull-in time:
[rad/s]
300
200
100
2 Din2
TP
16 3n
0
80
0.5
1
1.5
2
2.5
1.5
2
2.5
t [s]
[rad]
6
4
2
0
0
0.5
t [s]
The lock range DL is the frequency range within which a PLL locks within one-single beat
note between the reference frequency and the output frequency.
DL 2n 2
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1
kp
Ti
Lock-in time: TL
2
n
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Grid synchronization for power converters
Phase Locked Loop: the need of the orthogonal
component
Akd
sin 2int in out sin in out
2
To eliminate the 2° harmonic oscillation from
and obtain
Akd
sin in out it should be considered that
2
sin in - out sin in cos out cos in sin out
cos
Vsin int in
X
Vsin in - out
+
-
Vcos int in
1
K p 1
sTi
1
s
++
int out
in
X
sin
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Grid synchronization for power converters
Park transformation in the PD
Park transformation:
v
sin(in )
v V
cos(in )
vd cos(out ) sin(out ) v
v
q sin(out ) cos(out ) v
sin in cos out cos in sin out
sin in out
vd
V
v V
sin
sin
cos
cos
in
out
in
out
q
cos in out
Assuming in=out :
sin in out
vd
v V
cos
in
out
q
vin
Quadrature
Signal
Generator
q
vd
v
dq
vq
v V sin(in )
v
LF
PD
v
1 vf
k p 1
Ti s
c
v
d
VCO
1
s
out
vq
v
out
vd
in
out
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Grid synchronization for power converters
Park transformation in the PD
PI on vd
q
LF
PD
v
vin
Quadrature
Signal
Generator
vd
1 vf
k p 1
Ti s
c
v
dq
out
VCO
1
s
out in
v V sin(in ) ; vd 0
out 0
t0
d
vq v
in 0
PI on vq
t0
v
PD
v
vin
Quadrature
Signal
Generator
v
dq
vd v
LF
vq
out
VCO
1 vf
k p 1
Ti s
c
1
s
out in
2
v V sin(in ) ; vq 0
q
out
From here on, it will be considered:
vin v V sin in
Therefore:
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and PI on vq,, i.e.,
out in and vd v V
vq 0
in 0
t0
2 t0
v
d
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Grid synchronization for power converters
Methods to create the orthogonal component
Transport Delay T/4
LF
PD
vin
v
vd
Delay
T/4
v
dq
vq
1 se
k p 1
Ti s
c
VCO
1
s
vin
The transport delay block is easily implemented through the use of a first-in-first-out
(FIFO) buffer, with size set to one fourth the number of samples contained in one
cycle of the fundamental frequency.
This method works fine for fixed grid frequency. If the grid frequency is changing
with for ex +/-1 Hz, then the PLL will produce an error
If input voltage consists of several frequency components, orthogonal signals
generation will produce errors because each of the components should be delayed
one fourth of its fundamental period.
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Grid synchronization for power converters
Methods to create the orthogonal component
Inverse Park Transformation
LF
PD
vin
v
vd
1 se
k p 1
Ti s
c
v
dq
vq
VCO
1
s
vin
v
v
dq
vd
LPF
vq
LPF
A single phase voltage (v) and an internally generated signal (v’) are used as inputs to a Park
transformation block (αβ-dq). The d axis output of the Park transformation is used in a control loop to
obtain phase and frequency information of the input signal.
v’ is obtained through the use of an inverse Park transformation, where the inputs are the d and qaxis outputs of the Park transformation (dq-αβ). fed through first-order low pass filters.
Although the algorithm of the PLL based on the inverse Park transformation is easily implemented,
requiring only an inverse Park and two first-order low-pass filters
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Grid synchronization for power converters
Methods to create the orthogonal component
Second Order Generalized Integrator
q
S ( s)
SOGI
d
s
( s) 2
f
s 2
q
2
T (s) (s) 2
f
s 2
v
k
q v
-20
-40
v
45
0
-45
-90
10
20
-1
10
0
1
10
10
Frequency (Hz)
2
10
3
10
4
Q( )
0
-20
-40
-60
k=0.1
k=1
k=4
0
Phase (deg)
v
k s
D( s) ( s) 2
v
s k s 2
qv
k 2
Q(s)
( s) 2
v
s k s 2
k=0.1
k=1
k=4
90
SOGI
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D( )
0
-60
Phase (deg)
d
Magnitude (dB)
f
Magnitude (dB)
20
-45
-90
-135
-180
10
-1
10
0
1
10
10
Frequency (Hz)
2
10
3
10
4
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Grid synchronization for power converters
Methods using adaptive filters
Adaptive Notch Filter (ANF)
vout
s 2 2
ANF ( s )
(s) 2
vin
s ks 2
OSCILLATOR
cos
vin
v
k
vout
vout=0 when:
t
k
vout can not be directly used as
PD in the PLL
sin
vin A cos t in
OSCILLATOR
cos
vin
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v
vout=0 when:
t in
k
vout
vout can be used as PD in the
PLL
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Grid synchronization for power converters
Methods using adaptive filters
ANF-based PLL
VCO
PD
cos
1
s
v
vin
k
LF
vd
se
kc
c
Adaptive Notch Filter
1
s
Very sensible to frequency variation
ANF+PLL EPLL
cos
vin
v
1
s
k
Adaptive Notch Filter
LF
PD
vd
VCO
1 se
k p 1
Ti s
c
1
s
sin
Conventional PLL structure
Combination of an ANF with a
conventional PLL gives rise to the
Enhanced PLL (EPLL)
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More robust
Faster dynamic response
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Grid synchronization for power converters
Methods using adaptive filters
Enhanced PLL (EPLL)
v
v
v
V( )
k
v
v’
ABPF
PD
ff
LF
vd
PI
ju
sin
cos
VCO
BPAF
v
+
LP
e
×
-
u
Kp
VCO
+
+
+
90°
Ki
×
1
s Δω
1
s
+
θ
ω0
sin
K
y
1
s
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×
A
Original structure of the EPLL
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Grid synchronization for power converters
Methods using adaptive filters
SOGI-PLL
Adaptive band-pass filter:
ABPF ( s ) 1 ANF ( s )
v
ks
(s) 2
v
s ks 2
Damping factor is a function of
the detected frequency value
Second order generalized integrator follower:
If ’ can change, SOGI follower can be seen
as an adaptive band-pass filter with damping
factor set by k and unitary gain
v
k s
D( s) ( s) 2
v
s k s 2
v
v
k
qv
As in the EPLL, a standard PLL can be
used to detect grid frequency and angle
ju is 90º-leading v’ when the PLL is
synchronized in steady state
ju=-qu and qu qv’
It seems intuitive to use -qu (instead ju) as
the feedback signal for the PD of the PLL
PD
v
v
SOGI
VCO
LF
PI
ff
ju
sin
Conventional PLL structure
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Grid synchronization for power converters
Methods using adaptive filters
SOGI-based Frequency Locked Loop (SOGI-FLL)
v
v
k
qv
1
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Attenuates high-order harmonics of the grid
voltage.
FLL
Is frequency-adaptive by using a FLL and not a
PLL.
Is highly robust in front of transient events
since grid frequency is more stable than voltage
phase-angle.
qv
v
SOGI
v
Does not need any trigonometric function since
neither synchronous reference frame nor voltage
controlled oscillator are used in its algorithm.
ff
Entails light computational burden, using only
five integrators for detection of both sequence
components.
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Grid synchronization for power converters
Three-phase grid synchronization
Distorted and unbalanced voltage vector
b
VS
vS
VS1
VS5
a
V S5
VS1 VSn 2VS1VSn cosn 1t
2
2
VSn sin n 1t
t tan 1 1
n
V
V
cos
n
1
t
S
S
V S1
c
Neither constant amplitude nor
rotation speed
b
VS1
V S1
V S1
VS1
VS1 V S1
V S1 V S1
VS
t
t
a
v S (VS1 )2 (VS1 )2 2VS1VS1 cos(2 t 1 )
VS1 sin(2 t 1 )
t tan 1
1
1
V
V
cos(
2
t
)
S
S
1
c
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Grid synchronization for power converters
Characterization of voltage dips
Phase-voltages from
characteristic parameters
Type C
Type D
VSa F
VSa V
VSb 12 F
3
2
jV
VSb 12 V
3
2
jF
VSb 12 F
3
2
jV
VSb 12 V
3
2
jF
Type D
Type C
VS1 12 V F
Sequence components from
characteristic parameters
1.5
VS1 12 V F
V+=0.61589<-32.0197 ;V-=0.16411<108.5995
VS1 12
1.5
V=0.5<-20 ;F=0.75<-40
V+=0.61589<-32.0197 ;V-=0.16411<108.5995
V=0.5<-20 ;F=0.75<-40
1
0.5
0.5
0.5
0
-0.5
-0.5
-0.5
-1
-1
-1
-1.5
0
0.02
0.04
0.06
t [s]
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0.08
0.1
-1.5
0
V+=0.61589<-32.0197 ;V-=0.16411<108.5995
0
v
v [pu]
1
[pu]
1
0
V F
VS1 12 V F
1.5
V=0.5<-20 ;F=0.75<-40
vabc [pu]
0.02
0.04
0.06
t [s]
0.08
0.1
-1.5
-1.5
-1
-0.5
0
v [pu]
0.5
1
1.5
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Grid synchronization for power converters
Three-phase grid synchronization
Three-phase Synchronous Reference Frame PLL
vSa
vSb
v Sc
T
dq
vSd vˆ S
vSd
vSq
̂
PI
ˆ
150
1
s
ˆ
vS
( dq )
1
ˆ
ˆ)
vSd
1 cos( t )
1 cos( t
VS
V
S
1
ˆ
ˆ
vSq
sin( t )
sin( t )
7
vS
100
150
6
100
5
Balanced
voltage
50
vSd v S
4
0
50
vSq 0
3
-50
ˆ t
2
-100
0
1
-150
0
-50
0
150
7
150
100
vS
6
ˆ
75
100
50
4
50
0
vSd v S
3
-50
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50
t [ms]
100
5
Unbalanced
voltage
25
2
-100
1
-150
0
t
0
vSq 0
-50
0
25
50
t [ms]
75
100
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Grid synchronization for power converters
Three-phase grid synchronization
Three-phase Synchronous Reference Frame PLL
vSa
vSb
v Sc
T
dq
vSd vˆ S
vSd
vSq
̂
PI
1
s
ˆ
Near of synchronization: ' t
ˆ
sin(t ') t '
vS
( dq )
VS1
P( s )
*
vSq
1
̂
1
s
ˆ
c VS1ki
vS
1
cos(2t )
VS1
VS1
t '
sin(2t )
The SRF is not able to track instantaneous evolution
of the voltage vector when the PLL bandwidth is low
150
7
150
t
6
150
vˆ S1
100
100
5
50
50
4
50
0
3
-50
t ' 2t
V 1
vSq VS1 t S1 sin(2t ) ' VS1 '
VS
1
V
t S1 sin(2t )
VS
ˆ
2c s c 2
( s) 2
s 2c s c 2
k p VS1
2 ki
100
k
kp i
s
cos(t ') 1
vSq
2
-100
1
-150
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0
vSd
0
-50
0
ˆ t
-100
-50
-150
0
25
50
t [ms]
75
100
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Grid synchronization for power converters
Three-phase grid synchronization
Three-phase Synchronous Reference Frame PLL
7
150
vS
150
150
vSd
6
100
100
vˆ S1
100
5
50
50
vSq
4
50
0
0
3
-50
-50
2
-100
1
-150
0
0
-100
-50
-150
0
25
50
t [ms]
75
100
Setting a low PLL bandwidth and using a low-pass filter it is possible to obtain a
reasonable approximation of the positive sequence voltage but the dynamic is too slow.
Advanced filtering strategies can be used to cancel out the double frequency oscillation
keeping high locking dynamics, e.g., a repetitive controller based on a DFT algorithm.
Additional improvements are added to these filters to make them frequency adaptive.
vSa
vSb
v Sc
T
dq
ˆ
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vSd
vSd vˆ S
vSq
PI
Repetitive
controller
̂
1
s
ˆ
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Grid synchronization for power converters
Three-phase grid synchronization
Decoupled Doubled SRF-PLL. Decoupling
q 1
q 1
̂
̂ v
1
S
t 1
ˆ
ˆ
( dq 1 )
Near of synchronization: ' t
d 1
vS
1
1
1 cos( 2 t )
V
V
ˆ S sin(2 t 1 )
t
vS
1
cos(2 t )
1 cos( )
V
VS
1
sin(2 t )
sin( )
( dq 1 )
vSq m
vSd m
dm
vSd n d n
d 1
̂
v S1
vS
1
ˆ
vSd 1
ˆ)
1 cos( t )
1 cos( t
VS
Tdq1 v S VS
1
( )
vSq1
sin( t ˆ)
sin( t ˆ)
( dq 1 )
v S ̂
t
vS
cos( t ˆ)
cos( t 1 ˆ)
vSd 1
1
1
VS
Tdq1 v S VS
1
v
ˆ
ˆ
1
(
)
Sq
sin( t )
sin( t )
qm
vSq n q n
*
d n* vSd n
*
q n* vSq
n
( dq 1 )
1
S
1
S
This terms act as
interferences on
the SRF dqn
rotating at n
frequency and
viceversa
Generic decoupling cell:
vSd n VSn cos( n )
cos((n m)t )
sin((n m)t )
VSm cos( m )
VSm sin( m )
v n
n
Sqn VS sin( )
sin((n m)t )
cos((n m)t )
cos
ˆ
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ˆ
sin
n-m
n
DC
m
vSd m VSm cos( m )
n
n cos((n m)t )
n
n sin((n m)t )
V
cos(
)
V
sin(
)
v m
S
S
sin((n m)t )
.
m
cos((n m)t )
Sqm VS sin( )
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Grid synchronization for power converters
Three-phase grid synchronization
Decoupled Doubled SRF-PLL
PLL input normalization
*
*
vSq
1
v Sd 1
T v
y
dq
1
Sq 1
.
vS
abc
d
q
1
ˆ
vS
T
1
vq
2
q
vSq1
*
Sd 1
v
1 1*
DC d
*
vSq
1
1
1*
1 q
d 1 q
k p ki ̂
f
LPF
LPF
ˆ
vSd 1 vˆ S1
v Sq 1
T
dq 1
vSd 1
vSq 1
d
q
1
1
ˆ
Marco Liserre
v v
2
d
d
1
q
1
d
1
DC q
1
1*
*
vSd
1
*
vSq
1
1*
LPF
v Sd 1
v Sq 1
LPF
f
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Grid synchronization for power converters
Conclusions
Marco Liserre
PLL is a very useful method that enable the grid inverters to:
Create a "clean" current reference synchronized with the grid
Comply with the grid monitoring standards
The PLL generate is able to track the frequency and phase of the input
signal in a designed settling time
By setting a higher settling time a "filtering" effect can be achieved in order
to obtain a "clean" reference even with a polluted grid.
Some PLLs need two signals in quadrature at the input.
For single-phase systems as there is only one signal available, the
orthogonal signal needs to be created artificially.
Transport Delay, Inverse Park Transformation, or Second Order
Generalized Integrators are some the methods used for quadrature signal
generation.
Adaptive notch filters canceling fundamental utility frequency are used as
phase detectors in PLLs
FLL based on a SOGI is a very effective method for single phase
synchronization
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Grid synchronization for power converters
References
1. J. D. Ainsworth, “The phase-locked oscillator-a new control system for controlled static
convertors,” IEEE Transactions on Power Apparatus and Systems, vol. 87, no. 3, pp. 859-865,
Mar. 1968.
2. G. C. Hsieh, J. C. Hung, Phase-locked loop techniques – A survey, IEEE Trans. On Ind.
Electronics, vol.43, pp.609-615, Dec.1996.
3. F. M. Gardner, Phase Lock Techniques. New York: Wiley, 1979.
4. L. D. Zhang, M. H. J. Bollen Characteristic of voltage dips (sags) in power systems, IEEE Trans.
Power Delivery, vol.15, pp.827-832, April 2000.
5. F. Blaabjerg, R. Teodorescu, M. Liserre, and A. V. Timbus, “Overview of Control and Grid
Synchronization for Distributed Power Generation Systems”, IEEE Trans. on Ind. Electronics, Vol.
53, Oct. 2006 Page(s):1398 – 1409
6. M. K. Ghartemani, M.R. Iravani, “A method for synchronization of power electronic converters in
polluted and variable-frequency environments,” IEEE Trans. Power Systems, vol. 19, pp. 12631270, Aug. 2004.
7. M.K. Ghartemani, M.R. Iravani, “A Method for Synchronization of Power Electronic Converters in
Polluted and Variable-Frequency Environments,” IEEE Trans. Power Systems, vol. 19, Aug. 2004,
pp. 1263-1270.
8. H.-S. Song and K. Nam, “Dual current control scheme for PWM converter under unbalanced input
voltage conditions,” IEEE Trans. On Industrial Electronics, vol. 46, no. 5, pp. 953–959, 1999.
Marco Liserre
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Grid synchronization for power converters
References
1. P. Rodríguez, A. Luna, I. Candela, R. Teodorescu, and F. Blaabjerg, “Grid Synchronization of
Power Converters using Multiple Second Order Generalized Integrators,” IECON’08, Nov.
2008.
2. P. Rodríguez, J. Pou, J. Bergas, J.I. Candela, R. Burgos and D. Boroyevich, “Decoupled
Double Synchronous Reference Frame PLL for Power Converters Control,” IEEE Trans. on
Power Electronics, March 2007.
3. P. Rodriguez, R. Teodorescu, R.; I. Candela, I.; A.V. Timbus, M. Liserre, F. Blaabjerg, “New
Positive-sequence Voltage Detector for Grid Synchronization of Power Converters under
Faulty Grid Conditions,” PESC '06, June 2006.
4. M Ciubotaru, Teodorescu, R., Blaabjerg, F., “A New Single-Phase PLL Structure Based on
Second Order Generalized Integrator”, PESC’06, June 2006.
5. P. Rodríguez, A. Luna, M. Ciobotaru, R. Teodorescu, and F. Blaabjerg, “Advanced Grid
Synchronization System for Power Converters under Unbalanced and Distorted Operating
Conditions,” IECON’06, Nov. 2006.
6. S.-K. Chung, “Phase-Locked Loop for grid-connected three-phase power conversion
systems,” IEE Proceedings on Electronic Power Applications, vol. 147, no. 3, pp. 213–219,
2000.
7. Francisco Daniel Freijedo Fernández, “Contributions to Grid-Synchronization Techniques for
Power Electronic Converters”, PhD Thesis, Vigo University, Spain, 2009
Marco Liserre
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Grid synchronization for power converters
Acknowledgment
Part of the material is or was included in the present and/or past editions
of the
“Industrial/Ph.D. Course in Power Electronics for Renewable Energy
Systems – in theory and practice”
Speakers: R. Teodorescu, P. Rodriguez, M. Liserre, J. M. Guerrero,
Place: Aalborg University, Denmark
The course is held twice (May and November) every year
Marco Liserre
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