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SERIAL PORT INTERFACE
FOR MICROCONTROLLER
EMBEDDED INTO
INTEGRATED POWER METER
Mr. Borisav Jovanović,
Prof.dr Predrag Petković,
Prof.dr. Milunka Damnjanović,
Faculty of Electronic Engineering Nis, Serbia
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INTRODUCTION
Modern power meters relays on single chip devices referred to as integrated
power meter (IPM).
Proposed three-phase IPM integrates all primary functional blocks required
to implement solid-state energy meter.
The chip performs the precision computations necessary to measure: active,
reactive energy in four quadrants for all three-phases, instantaneous
frequency for each phase, RMS currents and voltages, active, reactive and
apparent power and power factor.
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INTRODUCTION
Fig.1 Architecture of the Integrated Power-Meter
IPM is a mixed signal circuit consisting of analog and digital signal processing
blocks (Fig.1).
The analog part of IPM contains Sigma-Delta AD converters
for current and voltage channels, Band-Gap voltage reference and PLL circuits.
The digital part is composed of digital filters, digital signal processing block (DSP)
and microcontroller unit together with integrated peripherals.
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THE MICROCONTROLLER UNIT OVERVIEW
MCU operates at 4.194 MHz.
Instruction set is compatible with 8052 microcontrollers.
One-byte instructions are performed in a single cycle.
Processing throughput of more than 4 MIPS.
Fig.2 Microcontroller unit memory map
Memory areas:
• program memory, implemented as internal 8kB SRAM block;
• external data memory, 2kB SRAM memory block which also resides on
chip;
• internal data memory shared between Special Function Register (SFR) and
256B RAM
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THE MICROCONTROLLER UNIT OVERVIEW
The MCU peripherals:
• three 8-bit wide digital in-out ports
• two programmable UART modules
• serial port interface (SPI) for communication with external EEPROM
memories
• LCD driver circuits capable to support up to 168 pixels LCD
• real-time clock
In AMIS CMOS 0.35μm technology we don’t have available on-chip
non-volatile memory blocks. Therefore, external EEPROM devices had to be
used together with the Integrated Power Meter
In the special programming mode, the IPM has ability to receive MCU
program through special UART input pin and store it into external EEPROM
memory through SPI pins.
After resetting MCU, in the initialization mode, program memory (internal
8kB SRAM block) is automatically loaded from external EEPROM memory
through SPI pins.
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SERIAL PORT INTERFACE
The interface between MCU and
EEPROM is designed as an I2C-like
serial port interface.The hardware
module dedicated for this purpose is
named MASTER SPI.
The communication between MCU and
the external EEPROM requires data
transfer during chip initialization,
programming and normal operation
mode.
Fig.3 MASTER SPI interface
Only two pins are required: SDA for data and SCL for clock. The serial clock
frequency is 100 kHz.
Internal communication with MCU employs two 8-bit Special Function
Registers: EEDATA and EECTRL that are embedded into MASTER SPI
block.
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SERIAL PORT INTERFACE
Table 1. EECTRL register content
Bit
position
Name
7
Error
Illegal command received
6
Busy
Serial Data Bus is busy
5
Rx_ack
Acknowledge received from EEPROM
4
Tx_ack
Acknowledge transmitted to EEPROM
3:0
Cmd(3:0)
Description
0
No operation
2
Receive a byte from EEPROM and send ACK
3
Transmit a byte to EEPROM
5
Issue a STOP sequence
6
Receive a byte from EEPROM and do not send
ACK
9
Issue a START sequence
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SERIAL PORT INTERFACE
Fig. 4 EECTRL(3:0)=1001
Issue a START sequence
Fig.5 EECTRL(3:0)=0101
Issue a STOP sequence
Writing data into four least significant bits of EECTRL register
commences the MASTER SPI actions.
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MCU PROGRAMMING AND INITIALIZATION
Fig. 6 The part of chip
dedicated for EEPROM
programming and chip
initialization
The main blocks are:
• MASTER SPI
• UART
• Finite State Machine (FSM)
• 8192-byte SRAM memory block
•13-bit COUNTER that defines the address for SRAM
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MCU PROGRAMMING AND INITIALIZATION
Fig. 7 The structure of one data package sent to the EEPROM
during programming mode
During programming mode all data received from UART block are serially
transmitted in form of 32-byte data packages through SDA pin to the EEPROM
device.
The 32-byte package begins with start bit, followed by device address byte,
high memory address byte, low memory address byte, 32 data bytes and
ends by stop bit. Bytes are separated by acknowledge bit received from
EEPROM
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MCU PROGRAMMING AND INITIALIZATION
Fig.8 Data package during SRAM initialization mode
Chip initialization begins after MCU reset. The FSM starts the communication
with a dummy write operation (one with no data bytes) to load the EEPROM
address counter.
The LSB in the second device address byte signifies read operation.
After receiveing 8192 bytes from EEPROM, FSM terminates the read operation.
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SIMULATION AND SYNTHESIS
The serial port interface as well as the whole digital part of a chip was
described in VHDL.
Behavioral model in VHDL is created for I2C EEPROM 24LC64 which is
after used in test-benches for SPI verification.
Digital synthesis was performed by Cadence tool named BuildGates.
Logical verification is carried out in NCsim digital circuit simulator
The used standard cell technology
is AMIS CMOS 0.35μm.
Table 2. Area of digital blocks
Digital block
Area (gates)
MASTER SPI
554.73
FSM
465.29
UART
291.25
COUNTER
68.98
8192 SRAM
50096.00
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SIMULATION AND SYNTHESIS
Fig. 9 EEPROM read operation
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CONCLUSION

MASTER SPI dedicated for communication with external EEPROM device
has I2C-like interface that operates at 100kHz.

External EEPROM is used for chip programming, SRAM program memory
initialization and also for storing the important measurement results
gathered during chip normal operating mode.

MASTER SPI can be programmed by 8052 microcontroller through only
two 8-bit Special Function Registers EEDATA and EECTRL

MASTER SPI as well as the whole digital part of a IPM system-on-chip is
coded in VHDL. The code was verified by simulations and synthesized by
Cadence tools.

AMI Semiconductor CMOS 0.35μm standard cell technology was used for
chip implementation.
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