Transcript VLF Interferometer - Stanford University

VLF Interferometer
Defense University Research
Instrumentation Program (DURIP)
Project Advisor:
Umran Inan
Project Team:
Jeffrey Chang,
Katie Braden,
Timothy Chevalier,
Andrew Park,
Joseph Payne
What Is the Interferometer?

Nine element array of time synchronous
receivers.
 Capable of simultaneous recording in 3
channels, like an expensive VCR.
 Low power, battery operated, standalone
units.
 Modular design for easy upgrade.
Purpose of Interferometer
Measure near field of HAARP modulated
electrojet currents.
– Determine spatial distribution of currents.
– Help to maximize ELF/VLF wave production.
Standalone receiver that can truly be
deployed anywhere anytime.
Interferometer V2.0
Version 1.0

Validate Sampling
method
 Test Connection to CF
media.
 Fix any gotchas
Version 2.0

Cleanup design
 Improve Stability
 Get ready for
Production
Arrangement of Interferometer
Interferometer Capabilities
Capture from ~100 Hz to ~10 kHz.
– Upper bound is largely variable by changing
filter and sample rate.
Sensitivity of 1.5*10-6 v/m-Hz-1/2 at 1khz.
Low power consumption, ~6W.
Store 1 GB of data.
Block Diagram of Receiver
Antennas
Line Receiver
Clipper
Anti-aliasing
LPF Filter
Preamplifier
16-Bit A/D
(250 ksps)
Preamp
1GB Storage
Device
CPU (i386)
Control Logic
(FPGA)
UT+ Oncore
GPS
Modem?
Line Receiver
Time Synchronization
1PPS GPS
Clock
Control Signals
FPGA
Temp.
Controlled
Crystal Osc.
~10MHz
16-Bit A/D
Control
Signals
Data Bus
i386
Main Equipment

Tern i386 controller.

IBM Microdrive.

Motorola Oncore UT+.
Equipment Cont.

1 x 6V, 189 A-Hr Batteries
2 x 12V, 55 A-Hr Batteries

Laptop.

Wagon!
Preamp
Preamp
Preamp Cards

Matches the impedence of the square loop
antenna with a transformer.
 Amplifies and filters signal.
 Output driver with a transformer.
Line Receiver
Motherboard
Motherboard

Voltage regulation.
 Mounts for CPU and GPS cards.
 FPGA for glue logic.
 ISA type slots for adapter cards.
CPU Card

Manufactured by Tern.
 I386 u-controller with lots of goodies…
 Two serial lines, one for programming, one
for LCD display and GPS.
 16 Bit data bus, 7 Bit Addressing (but word
access only)
 Port pins as CS for ADC or CF card.
GPS Card

Motorola Encore GPS card.
 Small form factor.
 For timing use, +/- 500ns timing accuracy.
 Serial I/O
Filter Card
Instrumentation Amplifier – differential
input to single ended output.
 Selectable 8 pole or 16 pole Chebyshev
filter.
 Selectable output gain from unity to 40dB.

Sample Filter
CF Storage Card

CF connector, capable of docking with both
Type I or Type II CF cards.
 CF cards in IDE mode.
 Otherwise, nothing special.
 Future version might have two flash card
slots on it.
Sampling Card

3 LTC1606 ADC chips, simultaneous
sampling (rated @ 250 ksps each).
 Sampling controlled by FPGA, with CS
from processor.
 16 bit tri-state buffers as hacked remedy to
power problem
 Temperature controlled oscillator…for
accurate timing.
Locations

HAARP
– Near transmitter
– Power lines nearby

Lake Louise & Paxton
– ~45 Minutes away
– In the middle of no-where
– No power lines nearby
– Low Noise
HAARP Setup
HAARP Setup
Lake Louise
Lake Louise
Lake Louise
Lake Louise
Lake Louise
HAARP SU Data
HAARP SU Data
HAARP SU Data
Lake Louise SU Data
Lake Louise SU Data
Lake Louise SU Data
HAARP AU Data
Lake Louise AU Data