Processor, Bus Driver, and Latches

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Transcript Processor, Bus Driver, and Latches

TEAM ZISSOU
presents….
“THE LOCATOR”
R. F. LOCATION SYSTEM
MIKE GOULD
KARA MCMILLIN
PEARLMAN CHRIS SINKEY
MARCUS
JACOB WILTGEN
R.F. Location Project
Compass Design
•
Transmitting Antenna
sends power signals
Receiving
Antennas
Power
• Antenna arrays receive
power signal
Rectifier
• Power is rectified and
amplified
Amplifier
•
DC power signal is
analyzed
68HC11
Microcontroller
•
2-D Location outputs to
Computer, LCD, or PDA
•
Bill Murray still confused.
Transmitting
Antenna
USB
Interface
Antenna Array Block Diagram
Receive
Antenna
Transmitter
DC
Converter
A/D
Microcontroller
6
System Block Diagram
Antenna 1
8
Antenna 2
8
Possibly:
Construct
Antenna 3
8
PC
Location
Algorithm
Output:
Display
Output:
Direction
Antenna Array Design
λ/4(1/ε )
r
50 Ω line
Digital Control pins
Phase Shifters
+
Shottky Diode / Rectifier / Filter
Phase Shifter Pin-out
QuickTime™ and a
TIFF (LZW) decompressor
are needed to see this picture.
QuickTime™ and a
TIFF (LZW) decompressor
are needed to see this picture.
10 deg
0 deg
30 deg
Receiving Array:
5 Element Power Pattern
20 deg
40 deg
0 deg
30 deg
10 deg
20 deg
40 deg
Receiving Array:
7 Element Power Pattern
Rectification to Amplification:
2.4-2.5 GHz Power Signal rectified immediately

Using a Schottky Diode: Surface Mount Low Barrier X-Band:
MACOM part # MA4E2054
RF input
On Antenna Board
DC output
To control Board
Schottky Diode output will be a low level DC Voltage
(~mV)
Amplification must take place to guarantee proper A/D
conversion:
Amplification using LF356 op-amp (easy, low noise, cheap)
Antenna Signal Filtering:
Implementing a LF356 op-amp to
create a “Sallen-Key” Low Pass Filter
 Design fc = 5kHz
Additional LPF with RC filter
MC68HC11 A/D
One of 8 channels implemented (PE0: pin59)
OPTION control Register:

on start-up
$1039 (enable A/D):
 ADPU: A/D Power Up: (1) Enables A/D capabilities
 CSEL: Clock Select Enable: (0) Use E Clock (2Mhz)
A/D Control/Status Register: (ADCTL)

$1030 (Define A/D parameters): __000000
 SCAN: Continuous Scan Control bit: (0) not used
 MULT: Multiple-Channel Control bit: (0) single channel used
 CD,CC,CB,CA: Channel Select Bits: 0000 = PE0
Processor, Bus Driver, and Latches
Chip Select, EPROM, SRAM
Antenna Control
Communication with
Peripherals
RS-232 interface with user
Use a CAN bus to link antennas

A balanced, 2-wire interface running over a
Shielded Twisted Pair
NRZ encoding reduces disturbances
CAN bus
RS-232
Software Executive
Main Loop


Task specific - latch data gathered on command
Subtasks
 Read data on latches
 Compare data from latches to determine highest power
reading
 Find a location with a simple distance algorithm:
Antenna 1
z
Antenna 2
ø
* Know Z and ø, can find d
Transmitter
d
 Output visual display on a dummy terminal for user
Updated Schedule:
Labor Division for 1st Milestone
Chris


Antenna designed and tested (including Shottky diode)
PCB board submitted for build
Jake/Kara


Control board running and tested (inputs and outputs)
Begin software implementation
Mike


Ordering phase shifter and Shottky diode
Amplifier designed and tested on control perf board
Marcus


Transmitter designed and tested
Wire-wrap the transmitter on a perf board
COSTS
(EXPECTED)
Received $1191 from UROP
Phase Shifters cost

Need 5 shifters per array = 5*2*72.50
PCB boards 33.00*3
General supplies used thus far

1191
-725
-99
-100
Wire wrap, resistors, caps, chips, etc.
Remaining funds
= 267
Questions?