Transcript 26_LLRF_for_ALBA_and_Max-IV_Cases

Digital LLRF: ALBA and Max-IV cases
RF&Linac Section - ALBA Accelerators Division
Angela Salom
Outline
 ALBA Overview
 ALBA LLRF
 Conceptual Design
 Main Functionalities and extra utilities
 Future upgrades
 Max-IV Overview
 Max-IV LLRF
 Conceptual Design
 Extra Utilities
 Future upgrades
 Summary and conclusion
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ALBA Overview
ALBA Overview
ALBA is a 3rd generation synchrotron light source, located at 20 km
from Barcelona, Spain, in operation with users since May 2012
Accelerators Main Parameters
Energy
Circumference
Beam Current
Emittance
3GeV
268m
400mA
4nm.rad
Lifetime
RF Freq
Beamlines
Digital LLRF: ALBA and Max-IV Cases – ALERT Workshop – May 2014
≈10h
500MHz
up to 34
4/22
Storage Ring RF Plants
RF Parameters
U0
1.3MeV/turn
Vtotal
3.6 MV
q
≈ 2.5
fs
≈ 9kHz
PRF
960kW
6 RF Plants of 160kW at 500 MHz
2 IOT Transmitters per RF cavity. Power combined in CaCo
Dampy Cavity
Normal Conducting
Single cell, HOM damped
3.3 MΩ
Digital LLRF System based on IQ mod/demod
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ALBA LLRF Conceptual Design
ALBA LLRF
Main Characteristics
 Based on digital technology using a
commercial cPCI board with FPGA
 Signal processing based on IQ
demodulation technique
 Main loops: Amplitude, phase and tuning
Digital board: VHS-ADC from Lyrtech
Loops Resolution and bandwidth (adjustable parameters)
Resolution
Bandwidth
Dynamic Range
Amplitude Loop
< 0.1% rms
[0.1, 50] kHz
30dB
Phase Loop
< 0.1º rms
[0.1, 50] kHz
360º
< ± 0.5º
--
< ± 75º
Tuning
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LLRF Conceptual Design
DIGITAL LLRF - HARDWARE SCHEME
Analog Timing System
520MHz
PCI Bus
Digital Timing
SystemDigital Board: cPCI
Commercial
IF
Analog
Front End
Down
Conversion
Control
Inputs
Diagnostics
Inputs
500MHz
80MHz
8 ADCs
80MHz
8 ADCs
80MHz
80MHz
FPGA
Digital IQ Demodulation
FPGA
Digital IQ Demodulation
and Control Loops
RF Forward Cavity Voltage(500MHz)
IQ Ctrl
IOT1&
IOT2
Analog
Front End
DC
8DACs
80MHz
Commercial
Tuning
ControlDigital
LoopBoard: cPCI
RF Cavity Voltage (500MHz)
CAVITY
500MHz
Up
Conversion
IOT2
CACO
IOT1
ICEPAP
Motor Controller
13 RF Diagnostic Signals (500MHz)
Conceptual Design and Prototype
Analog Front Ends for Downconversion (RF to IF) and Upconversion (DC to RF)
Digital Commercial Board: cPCI with 16 ADCs, 8 DACs and Virtex-4 FPGA
Timing systems: 520MHz (500 + 20 MHz) for downconversion synchronized with
digital 80MHz clock for digital acquisition
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Extra Utilities of ALBA LLRF
Automatic Conditioning
 Square modulation of RF Drives at 10Hz
 Amplitude and duty cycle of RF Drive automatically adjusted by LLRF
depending on vacuum pressure levels
-7
Power Up
x 10
-7
Power Down
x 10
6
8kW
Vac Limit Up
65
2
4
Vacuum (mbar)
55
Power (a.u.)
Vac (mbar)
60
Power (kW)
5
1kW
Vac Limit Down
2
50
0
0
50
100
150
200
250
Cavity Reference
Cavity Voltage
Vacuum
45
300
350
Vacuum
Cavity Reference
Cavity Voltage
600W
Voltage Increase rate set to 0.03mV/s
0
50
100
0
150
Voltage Decrease rate set to 1mV/s
 Vacuum < Limit Down  Voltage Amplitude Increases/Decreases
 Vacuum > Limit Up  Voltage Amplitude remains constant until vacuum is below limit down
This system allowed to condition the last SR cavity in less than a week
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RF Autorecovery with beam
 Why we need Autorecovery with beam?
- One cavity -out of six- trips
- Beam is not lost
- One wants to recover the tripped cavity with heavy beam loading
New Automatic Start up – to take into account beam loading:
- When RF trip
- Open loops (I&Q)
- Disable tuning
- Detune cavity (parking) by moving the plunger 30,000 steps up
- When RF ON:
- IOT power high enough to induce more voltage in the cavity than the
beam loading after unparking
- Amplitude and phase loops open because cavity is completely detuned
- Phase and amplitude of LLRF adjusted to have very similar conditions in
open loop and close loop
- Plunger moved back 30,000 steps to tune cavity (unparking)
- Tuning enabled
- Amplitude and phase loops closed
- Smooth power increase
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Fast Data Logger
Post Mortem Analysis Example: Transient after one cavity failure
and beam survival
Power to beam increases
Beam phase gets reduced
Frequency oscillations ~ 6kHz (synchrotron freq)
Stabilization time ~ 3ms (longitudinal damping time)
Cav Dis - RvCav - Beam Power
12
Cav Dis
BeamPower
RvCav
10
kW
8
6
4
2
0
0
0.5
1
1.5
2
2.5
3
3.5
Beam Phase
t(s)
4
-3
x 10
150
Beam Phase (º)
140
(º)
130
120
110
100
t(s)
0
0.5
1
1.5
2
2.5
3
3.5
4
-3
x 10
Behavior of one cavity and a trip in another cavity at 61mA and no beam dump (61mA)
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Future upgrades of ALBA LLRF
Feedforward Loop for RF Trip transient
Feedforward loop to compensate transient when RF cavity trips
When cavity trips
- Cavity Voltage oscillates with frequency
equal to synchrotron tune
- Transient time equal to damping time
of machine
Compensation
- Amplitude modulation triggered when
one cavity trips
- Frequency, amplitude and phase of
modulation are adjustable parameters
 First tests with beam
- First ripple of transient reduced, but following increased
- Next step: to modulate phase of the RF Drive instead of Amplitude
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FF Loop for beam loading compensation
 In Normal Operation: Effect of beam loading negligible
-
Revolution frequency ~ 1MHz
-
90% Filling Pattern
-
10 trains: 10 x (32 bunches + 12 empty buckets)
 Filling Pattern modified to 1/3 to measure beam loading
-
Beam Phase modified by 5º due to beam loadign effect
-
Future upgrade: Phase modulation (feed-forward loop) to compensate this
effect
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Max-IV Overview
ALBA Overview
Max-IV will be a 3rd generation synchrotron light source, located in
Lund, Sweden. Inauguration foreseen for June 2016
Accelerators Main Parameters
Full Injector Linac + 2 SR (1.5GeV and 3GeV)  Option for FEL upgrade
Circumference
Beam Current
Emittance
RF Freq
528m
500mA
< 0.3 nm.rad
100MHz
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Max-IV LLRF
Similarities:
Max-IV LLRF Design based on
ALBA LLRF
 Based on digital Commercial Boards with FPGA, ADCs & DACs
 Based on IQ modulation/demodulation technique
 Main Loops: Amplitude, Phase and Tuning of the Cavity
Main differences:
 100MHz RF Signals sent directly to ADCs – No Downconversion
 Two Cavities controlled by one LLRF system
Analog Timing
System
PCI Bus
Digital Timing System
80MHz
16 ADCs
80MHz
8 ADCs
80MHz
80MHz
FPGA
Digital IQ Demodulation
IQ Ctrl
1&2
FPGA
Digital IQ Demodulation
and Control Loops
DC
8DACs
80MHz
Tuning Control Loop
Control
Inputs
Diagnostics
Inputs
RF Cavity Forward Power
RF Cavity Voltage
10 RF Diagnostic Signals
Analog
Front End
100MHz
Up
Conversion
Tetrode
CAVITY
Tetrode
Motor
Controller
Tetrode
RF Cavity Forward Power
RF Cavity Voltage
100MHz
CAVITY
Tetrode
10 RF Diagnostic Signals
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Max-IV Extra Utilities
Fast Interlock Utility
 When fast interlock detected, RF Drive cut in less than 10us
 Fast interlocks are:
Reverse power of cavity
Arcs
 Vacuum peak
3rd Harmonic Cavity Tuning – 300MHz
Possibility to control Cavity Voltage or Forward Power of Tetrode
Automatic Startup
Automatic Conditioning
Fast Data Logger for post-mortem analysis
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Max-IV Status and future upgrades
Status:
 Prototype tested in Max-II with 2
cavities
 97% of the FPGA resources already
used
HOST PC
Future Upgrades: Perseus
 New hardware platforms available for
same price and more powerful
 Perseus System: uTCA carrier with
FPGA Virtex-6 + FMC modules
(daughter boards) with fast ADCs and
DACs
uTCA Chassis
 Firmware already migrated to new
FPGA board. Only 12% of resources
were used
8 DACS
BOARD
MO1000
16 ADCs
BOARD
MI125
1Gb Memory . FDL
 Prototype being used for conditioning of
cavities of Max-IV Rings
1Gb Memory . FDL
Backplane communications
16 ADCs
BOARD
MI125
DIGITAL INTERFACE
DIGITAL INTERFACE
PERSEUS A
PERSEUS B
MESTOR BREAKOUT BOX
Interface with:
- motor drivers
- transmitter
- vacuum signals for conditioning
- VCXO
FLEXIBLE MESTOR CABLE
Interlocks Interface:
- Vacuum
- Arcs
- MPS
- Plunger End switches
- Pin diode switches
- Fast Data Logger Trigger-
 Tests with high power to be done in
Summer 2014
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Summary and Conclusions
ALBA LLRF system:
 In operation for several years and meets requirements
 Constant upgrades to improve reliability of RF systems: Automatic
recovery + feed-forward loops
Max-IV LLRF System
 Main functionality of system already tested
 Working on hardware upgrade before starting series production
Main advantages of Digital Low Level RF Systems:
 High flexibility
 Upgrades based just on firmware modifications (low cost)
 Firmware can be easily migrated to different hardware platforms
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Thanks for your attention
Questions?