Transcript CSCM_2014-06-11_Verweij_for_LMC

CSCM
Arjan Verweij, on behalf of the CSCM team
Technical info:
 CSCM mini review on 30/11/2011
(indico 163905)
 CSCM session of the 3rd splice review
on 14/11/2012 (indico 204695)
 MPE-TM of 13/6/2013 concerning
results of the type test (indico 257216)
and in many other meetings (CSCM, MPETM, TE-TM)
Arjan Verweij, LMC meeting, 11/6/2014
Outline
 Motivation
 Preparation phase and test phase
 Detection and protection
 Risks during the test
 Program and planning
 Conclusion
Arjan Verweij, LMC meeting, 11/6/2014
Motivation: Protection of the RB circuit
Current
Lead
Dipole 1
Cu HTS
I
Bus-bar
segment
Dipole 3
Bus-bar
segment
Dipole 153
Current
Lead
Bus-bar
segment
HTS Cu
Power
Converter
U_earth
U_earth
U_earth
(One voltage feeler per 1/2cell)
U_BB_1
Energy
Extraction
System
Cu HTS
Current
Lead
Bus-bar
segment
U_BB_2
Dipole 2
Bus-bar
segment
Dipole 4
Bus-bar
segment
Energy
Extraction
System
Dipole 154
HTS Cu
Current
Lead
Normal operation: the current flows through the SC cable (magnet coil & centre
of the bus).
Protection of the SC consists of:
- QPS, detecting the quench  switching off the PC, opening the EE switches
forcing the current to decay with t=100 s,
- Bypass diodes, taking over the current if the coil quenches
- Bus stabiliser, taking over the current if the bus quenches (either directly or
due to heat propagating from a quenching magnet)
Arjan Verweij, LMC meeting, 11/6/2014
Motivation: Protection of the RB circuit
The diode, the diode leads, and the bus stabiliser (referred to as RB
bypass) should be able to carry the current during the decay without
overheating.
The RB bypass is a passive protection element, but is itself not protected
and not redundant.
The RB bypass has to be fully reliable, since nothing can reduce the
decay time constant in the circuit (except massive quenching).
Local overheating can result in burn-through, resulting in opening of the
circuit & arcing, as experienced in 2008.
Arjan Verweij, LMC meeting, 11/6/2014
Motivation: Bus discontinuities
Nr of circuits: 8 x RB, 8 x RQD, 8 x RQF
In each RB circuit there are many discontinuities, each of which has a small
possibility of having a local excess resistance.
RB bus
Discontinuity
Number
per sector
Connections between lead and pigtail
4
Y
No
Connections between pigtail and busbar
4
Y
No
Busbar joints
420x2
Y
No
Bus lyras in MB
308x2
Y*
No
Bus double lyras in MQ
100x2
Y*
No
308
Y
No
308x2
Y
No
‘Half moon’ connections
308
Y
No
Connections between bus and heat sink
308
Y
Y
Connections between heat sink and diode
308
Y
Y
T-connections
Diode bypass
Tested at
Tested at
warm, I<10 A cold, I=13 kA
Diode bus lyras
* Tested with limited accuracy, not ruling out possible critical defects
In total there are about 28000 discontinuities in the 8 RB circuits!!
Arjan Verweij, LMC meeting, 11/6/2014
Motivation: expected quenches
In the coming few years (until LS2) we will probably have:
 O(10) dipole quenches if we stay at 6 TeV
 O(100) dipole quenches if we go to 6.5 TeV
 O(1000) dipole quenches if we push to 7 TeV
Note that each quench will cause about 4 quenches in adjacent magnets
(at 3-8 kA) and will cause about 100 m of busbar to quench. So a
significant percentage (5%, 20%, 80%) of the RB bypass will see high
currents.
Testing is of course not needed if we are 100% sure that all connections
are safe, also at high current.
However, if we are not 100% sure, we better perform the CSCM to reduce
known risks.
Arjan Verweij, LMC meeting, 11/6/2014
CSCM: preparation phase
The CSCM is a test to fully qualify if the RB bypass can take
over the current if the SC quenches. A kind of dry-run of the RB
bypass.
Basic idea
• Connect the two 6 kA/200 V PC’s in series
• Stabilize the entire sector at around 20 K, so the magnets
and bus are not SC. Keep the DFB at 4.5 K.
• Put a current pulse of maximum 11 kA, t=100 s
Arjan Verweij, LMC meeting, 11/6/2014
CSCM: test phase
1.Insert a few 100 A to open the
diodes and stabilize the forward
voltage.
Example of a run with Imax=6 kA.
Current and voltage on the converter.
Current
Voltage
2.Perform an ohmic
measurement of all busbar
segments
3.Quickly increase the current to
Imax
4.Decay the current with t=88 s
3
4
1
2
Arjan Verweij, LMC meeting, 11/6/2014
CSCM detection and protection
 During normal operation the RB bypass is not protected, since nothing can
change the decay time constant in the circuit (except massive quenching).
 During the CSCM we use a “modified nQPS”, denoted as mQPS, to measure
the voltage and protect the RB bypass.
mQPS
Board A
mQPS
Board B
Arjan Verweij, LMC meeting, 11/6/2014
Result from type test (before LS1)
RB, 9 kA,
Board A, Voltage
RB, 9 kA,
Board A, dV/dt
We are able to
clearly detect a
defect in the bus
starting a thermal
runaway.
CSCM risks
 In case of QPS trigger, the converter is shut down and the current
decays linearly to 0 A in about 0.2 s.
 In the rare possibility of sudden opening of the circuit, the local heat
dissipation in the arc will be less than 20 kJ, which is in theory sufficient
to melt one cm of busbar, but cannot cause collateral damage. For
example: creating a hole in the M-line requires more than 100 kJ.
 We do not see any possibility for collateral damage.
Normal operation
CSCM
Maximum stored energy
1 GJ
200 kJ
t after QPS trigger
100 s
0.2 s
Energy dissipated in a possible arc
4 MJ
20 kJ
Arjan Verweij, TE-TM meeting, 10/6/2014
CSCM program and planning
A thermal runaway in a defective part of the RB bypass depends on:
 the MIIt’s
 the instantaneous power, so the maximum current
during the current pulse.
Also the electromagnetic forces on the bus and diode leads depend on the
maximum current.
We therefore plan to have a staged approach with increasing Imax:
2 kA, 6 kA, 8 kA, 10 kA, 11 kA
with detailed analysis after each run.
The maximum current should be equal to the operation current
during Run 2, so up to 11 kA.
Arjan Verweij, LMC meeting, 11/6/2014
CSCM program and planning
 Cool-down from 80 to 20 K. In the mean time (without impact on planning):
 Change of the PC configuration from 12 kA/200 V to 6 kA/400 V
 QPS commissioning
 Temperature stabilization at 20 K: 1 week per sector. In the mean time: ELQA
testing.
 CSCM tests: 1 week per sector (incl. contingency)
 Cool-down from 20 K to 1.9 K. In the mean time (without impact on planning):
 Change of the PC back to the original configuration
 Reconfiguration and locking of QPS in normal operation mode.
 Powering tests of the HWC
EPC resources for 6 sectors are not identified yet.
The original planning had a 4 week period in 3 sectors reserved for the CSCM. For
S67 we keep the planning. The other sectors can be done in 2 weeks (tbc after
S67). Impact on global planning to be worked out by planning office.
Arjan Verweij, LMC meeting, 11/6/2014
Conclusions
 The RB bypasses, including its 28000 discontinuities, should be fully
reliable during LHC operation since they constitute the passive
protection of the RB circuits, each having a stored energy of up to 1 GJ.
 We can now perform the CSCM test in all sectors without swapping
QPS boards, so with much less resources and risk than initially
foreseen.
 The CSCM type test last year was very successful!!
 A test in one sector can be done in 2 weeks, including temperature
stabilization.
 There are no showstoppers - from Cryo, Powering, QPS, magnet, diode,
and analysis point of view - to perform the CSCM.
Proposal:
 Perform a type test with final configuration in S67.
 Prepare for CSCM test in the 7 remaining sectors.
Arjan Verweij, LMC meeting, 11/6/2014