Transcript The Mosfet Transistor

Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
The ideal Mos Capacitor
 In order to determine the electrical characteristics
(threshold voltage) of the transistor, it is easier to study the
MOS capacitor first.
Gate
Gate
Source
Drain
N+
N+
Silicon
P-substrate
Bulk
Bulk
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
The ideal Mos Capacitor
 The MOS capacitor is a poly-Si/SiO2/Si structure.
Gate
Gate-contact :
Insulating
polysiliconlayer SiO2
P-type
Silicon
P-type silicon substrate
Back-side metallization
Bulk
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
The ideal Mos Capacitor
 VGB < 0
 When negative voltage is applied to the gate with
respect to the semiconductor :
 Potential is applied between insulating
layer and semiconductor
 Electric field appears toward the gate
 majority carriers (holes) are attracted to
the surface of the p-type semiconductor
 The semiconductor near the surface
becomes more p-type :
accumulation
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
The ideal Mos Capacitor
 VGB > 0
 When positive voltage is applied to the gate with
respect to the semiconductor :
 Electric field appears toward the drain
 The positive voltage will induce a
negative charge to appear near the
surface of the p-type semiconductor
 The semiconductor near the surface
becomes less p-type :
depletion
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
The ideal Mos Capacitor
 VGB = Vth
 the threshold voltage Vth is defined as
the applied voltage when the electron
concentration is two times bigger than
the initial hole concentration
 the region near the surface in this case
has conduction properties of n-type
material
 the n-type surface layer is formed not by
doping but instead by inversion of the
originally p-type material due to the
applied voltage
 this inverted region separated from the
underlying p-type material by a depletion
layer is the basis of MOSFET operation
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
The ideal Mos Capacitor
 VGB > 0 and more than Vth
 With further increase in positively applied voltage, and
higher than the threshold voltage Vth :
 electric field remains toward the bulk
 electric field magnitude is high in the
semiconductor
 minority carriers (electrons) are attracted
towards the surface
 when the electron concentration is
bigger than the hole concentration, a
thin n-type layer is created
 the semiconductor near the surface
becomes n-type :
inversion
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
The Mosfet Transistor
 Field-effect transistors (FET) operation is based on an
electric field effect (established by a voltage applied to the
control gate terminal)
 FETs are also called unipolar transistor since the current is
conducted by only one type of carrier
 MOSFET stands for Metal-Oxide-Semiconductor FET
even though all advanced VLSI processes uses polysilicon
Gate
gate rather than metal gate
Source
Drain
 Properly bias of transistor is :



source and bulk are shortcircuited and grounded
gate to source voltage is VGS
drain to source voltage is VDS
N+
N+
P-substrate
Bulk
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
The Mosfet Transistor (cont’d) : VGS < 0 and VDS > 0
 The MOSFET is a normally off device.
 With a small negative VGS, more holes will be attracted to
the surface underneath the gate.
 Source and bulk are grounded and then the sourcebulk junction is in equilibrium state
 drain voltage is positive and then drain-bulk junction is
reverse biased
 No current path exists.
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
(VGS < Vth )
The Mosfet Transistor (cont’d) : VGS > 0 and VDS > 0
 With a small positive VGS, holes will be pushed away from
the surface underneath the gate.
 Source-bulk junction is in equilibrium state
 Drain-bulk junction is reverse biased
 No current or small current exists between drain and
source.
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
(VGS > Vth )
The Mosfet Transistor (cont’d) : VGS > 0 and small VDS > 0
 Electrons will begin to accumulate, forming a conduction
channel.
 Small VDS has no influence on VGS bias and then the
channel is uniform
 Current path exists between drain and source
 VGS influences the electron concentration
in the conduction channel :

as VGS increases, the concentration
increases,
 on-state resistance decreases
 linear variation of the current versus drain
voltage VDS
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
(VGS > Vth )
The Mosfet Transistor (cont’d) : VGS > 0 and high VDS > 0
 As VDS increases, drain-bulk junction is highly reverse
biased and then SCR is stretched
 the potential difference between the gate and the drain
decreases. The channel formed will no longer be uniform
and begin to tapper off near the drain end. The voltage
VDS is noted VDSsat
Gate
+
Source
Drain
VGS>VTH
VDS>0
+
N+
N+
P-substrate
Bulk
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
(VGS > Vth )
The Mosfet Transistor (cont’d) : VGS > 0 and high VDS > 0
 Eventually the channel at the drain end will disappear as
VDGVTH.
 The drain current will not shut off abruptly, but instead will
remain at the same level called IDSsat.
 The pinched channel can be considered as a choke point.
This point moves toward the source as VDS increases.
 Current is due to the electrons flow in the conduction
channel, due to the electric field (Drain toward Source).
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
Mosfet Operation (cont’d)
 MOSFETs have two regions of operation :
 the triode
 the saturation regions.
iD
Triode
(linear region)
vDS<vGSVT
Saturation region
(active region)
vDS > vGS VT
VGS increease
VGS  VT+1
VGS VT
vDS
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
Mosfet Operation (cont’d)
 The threshold voltage can be changed by deliberately
adjusting the doping concentration near the surface of the
channel.
 In the extreme, a channel can be formed (by ionimplantation) without an applied voltage. This type of
MOSFET is called depletion mode device.
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
Mosfet Operation (cont’d)
 Drain current is proportional to the channel width Z, and
inversely proportional to length L,
 Current in the transistor is limited to few mA
 L should be as short as possible, and also the doping level
of the channel (in order to have a small Vth) :


source
SCR of drain-bulk junction can
reach source-bulk junction even for
small VDS voltage
Maximum voltage of VDS is limited
N+
This structure is not suitable
for power
drain
gate
L
P
bulk
Z
N+
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
The Mosfet transistor structure
 High voltage device requires a low doped and thick layer.
 High current device needs numerous basic cell in parallel
 vertical structure is the solution
source metallization
polysilicon
gate
P well
l
axia
epit er
lay
channel
NN+
source cell
drain metallization
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
The Mosfet transistor structure
 High voltage device requires a low doped and thick layer.
 High current device needs numerous basic cell in parallel
 vertical structure is the solution
 Conduction channel is formed in p-type
region underneath the gate.
 N-type low doped layer allows to achieve
high breakdown voltage
 Electrons reach the n-type layer and then
flow vertically toward the drain
 Low doped region is resistive and then it is
necessary to reduce current density
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
The Mosfet transistor structure
 As VDS increases, SCR stretches in n-type and p-type
zone.
 Conduction channel is pinched-off
 Electric field in SCR sweeps
the electrons toward the drain
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
The Mosfet transistor equivalent circuit
Source
N+
P+
RP
Gate
P
NRN
N+
Drain
N+
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
The Mos-Bipolar Power Devices
 Advantages and drawbacks of MOSFET

Advantages
MOSFET transistor is unipolar device
conduction is conducted by majority carriers
lack of storage charge involves a high switching speed
MOSFET transistor is fast
Control is made through a voltage applied to the gate
(capacitor)
during steady state, voltage is sufficient
during transient switching, a dynamic current is required to
load and unload the input capacitor
Control energy is necessary only during the switchings
MOSFET transistor is easy to control
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
The Mos-Bipolar Power Devices

Drawbacks
Conduction assumed by majority carriers requires
electric field
voltage drop in the layers
this voltage drop increases as :
breakdown voltage is higher
current density is higher
losses are important in a power MOSFET
Conduction losses are important in MOSFET
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
The Mos-Bipolar Power Devices
 Advantages and drawbacks of Bipolar

Drawbacks
 Conduction with minority carriers implies storage
charge
during transient switching, this charge needs to be loaded and
unloaded
switching time is slow in bipolar transistor
Bipolar transistor is relatively slow
control of the device requires current
control requires energy during all conduction periods
Control of Bipolar transistor requires energy
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
The Mos-Bipolar Power Devices
 Advantages and drawbacks of Bipolar

Advantages
Conduction is assumed by both type of carriers
Basic principle of conduction is diffusion of carriers
electric field in the layers is low
small forward voltage drop
small conduction losses
Conduction losses are small in bipolar transistor
In order to profit by advantages of both types of transistor :
MOS-Bipolar Power Devices
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
Insulated Gate Bipolar Transistor (IGBT)
 Top structure is identical to MOSFET
 Substrate is p-type

two kinds of IGBT :
with buffer layer
homogeneous base
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
Insulated Gate Bipolar Transistor (IGBT)
 Forward bias of transistor is :



emitter and bulk are shortcircuited and grounded
gate to emitter voltage is VGE
collector to emittter voltage is
VCE > 0
 In forward mode, J1 is forward and
J2 is reverse
 n-type buffer layer allows to reduce
the thickness of N- layer and avoid
punch-through of J1
IGBT with buffer layer
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
Insulated Gate Bipolar Transistor (IGBT)
 Top structure is identical to the IGBT with homogeneous base
previous one
 punch through is avoided
thanks to a thick n-type layer
 P+-layer is very thin
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
Insulated Gate Bipolar Transistor (IGBT)
 For both types of IGBT, a positive voltage VGE will involve a
conduction channel in p-type layer underneath the gate
 As VCE is higher than Vbi of J1, then MOS part of the device
will inject electrons in n-type layer
 N-type layer is the base of a PNP transistor, where J1 is
collector-base and J2 is emitter-base junction
 MOS part of the device supplies the base current of the bipolar
PNP transistor
 Then junction J1 injects holes in n-type layer
 Holes diffuse in n-type layer and are collected by J2
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
Insulated Gate Bipolar Transistor (IGBT)
Emitter
N+
P+
N+
RP
Gate
P
N-
N-
P+
Collector
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
Insulated Gate Bipolar Transistor (IGBT)
C
G
E
 High input impedance and high current
gaIn
 Turn off by zero gate voltage (remove
the conducting channel)
 Faster switching speed than BJT and
can operate in medium power up to 20
kHz
 Improved input and output capacitances
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
Insulated Gate Bipolar Transistor (IGBT)
 Effect of the
minority carrier
lifetime on the
current queue
 Turn off of the device can be divided in
two parts :

10
IEC current [A]
• bipolar transistor has then a non
connected base
1 µs
0.5 µs
8
6

4
2
0
0,0
1,0x10-6
2,0x10-6
3,0x10-6
time [s]
4,0x10-6
gate to emitter voltage VGE decrease will
induce the break of conduction of the MOS
transistor
5,0x10-6
bipolar transistor will remove the storage
charge either by collector current or
recombination
• The decrease of the current is
slower with a time constant
depending on the lifetime of the
minority carriers
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
Insulated Gate Bipolar Transistor (IGBT)
 Structure and circuit used for the turn off
60 µm
100 V
200 nH
10 W
10 W
C
8 µm
30 µm
G
10 µm/ 1016 cm-3
Com
10 µm/ 1018 cm-3
E
1014 cm-3
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
Insulated Gate Bipolar Transistor (IGBT)
P-type buried layer
Base
Buffer layer
Concentration [cm-3]
 Doping concentration in the device
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
Switching off of the IGBT : t = 0
Concentration [cm-3]
Concentration [cm-3]
 Storage charge in the base is important (in the range
of 1016 cm-3)
Electron distribution
Hole distribution
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
Switching off of the IGBT : t = 80 ns
Concentration [cm-3]
Concentration [cm-3]
 MOS part of the device stops supply the base
current of the bipolar PNP transistor
 SCR will stretch in the base by sweeping the carriers
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
Switching off of the IGBT : t = 1 µs
Concentration [cm-3]
Concentration [cm-3]
 As reverse voltage increases, SCR is stretched
 Storage charge has drastically decreased
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
Switching Characteristics
Ideal Switch :
 No power Limit (unlimited breakdown voltage and forward
current)
 Zero turn-on and turn-off times (infinite frequency of
operation)
 No power dissipation (no on-resistance and no leakage
current)
Practical switch :
 Limited power handling capabilities (max voltage and max
current)
 Delayed turning on and off (limited frequency of operation)
 On-resistance and off-leakage current (power dissipation)
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
Ideal Switching Characteristic Curves :
vsw
Voff
Von
time
Ion
isw
Ioff
time
p(t)
time
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
Non-Ideal Characteristic Curves :
• Different losses should be considered :
• conduction losses
• off losses
vs
w
Voff
Von
• switching losses
time
Ion
isw
Ioff
p(t)
time
Pmax
Pmin
time
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
Power Diode
I-V characteristic
iD
+
iD
vD
_
IF
V BR
iD
Is
V F vD
ON
OFF
vD
Typical I-V characteristic
Ideal I-V characteristic
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
Thyristor
I-V characteristic i
A
Anode (A)
iA
+
vAK
Forward blocking
region
ig
ig3>ig2>i g1
_
Cathode (K)
ig1 ig1 ig1 ig1 ig1 ig=0
Max reverse
voltage
Latching current
Holding current
 vAK
Reverse
avalanche region
Forward breakover vAK
voltage
Reverse blocking
region
iA
ON
Reverse voltage
blocking
Forward current
carrying(ON)
Forward voltage
blocking(OFF)
vAK
Typical I-V characteristic
Ideal I-V characteristic
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
Bipolar Junction Transistor (BJT)
I-V characteristic
iC
iC
Saturation(OFF-state)
+
iB
vCE
_
Increasing
base
current
Active region
iC
ON-state
Cut-OFF(OFF-state)
vCE
OFF-state
vCE
Ideal switch characteristics
Typical I-V characteristic
Ideal I-V characteristic
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
Power MOSFET
I-V characteristic
iD
Triode
(linear region)
vDS<vGSVT
Saturation region
(active region)
vDS > vGS VT
Drain (D)
VGS increease
+
VGS  VT+1
vDS
Gate (G)
+
VGS VT
BE
vDS
Typical I-V characteristic
v

_
Source (S)
Power semiconductor device physics Part 1 & 2 : Prof. J.P. Chante
December 02th, 2002
Thermal model of the system
Thermal
flux
Q
In order to estimate
the maximum
junction
temperature
SemiAl2O3
Powerconducteur
Chip
Dissipateur
Heat sink
Substrate
R1
R2
R3
Rc
Ta
Qin
C1
C1
2
6
C3
C2
C1 + C2
2
6
C2 + C 3
2
6
C3
2