PV generation class notes

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Transcript PV generation class notes

PV Cells Technologies
• Characterization criterion:
• Thickness:
• Conventional – thick cells (200 - 500 μm)
• Thin film (1 – 10 μm). Tend to be less costly than conventional
(think) cells but they also tend to be less reliable and efficient.
• Crystalline configuration:
• Single crystal
• Multicrystalline: cell formed by 1mm to 10cm single crystal areas.
• Polycrystalline: cell formed by 1μm to 1mm single crystal areas.
• Microcrystalline: cell formed by areas of less than 1μm across.
• Amorphous: No single crystal areas.
• p and n region materials:
• Same material: homojunction (Si)
• Different material: heterojunction (CdS and CuInSe2)
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© Alexis Kwasinski, 2012
PV Cells Technologies
Uni-Solar solar shingle
BP SX170B Polycrystalline
BP SX170B Monocrystalline
Uni-Solar Laminate PVL-136
Amorphous
Mitsubishi PV-TD 190MF5
Multicrystalline
PV Modules at ENS
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PV Cells Technologies
• Thick film fabrication techniques:
• Czochraski’s (CZ): for single-crystal silicon. Costly.
• Float zone process (FZ): also for single-crystal silicon. Costly
• Ribbon silicon
• Cast silicon: for multicrystalline cells. Less costly.
• Thin film
• Can be used embedded in semitransparent windows.
• Techniques:
• Amorphous Silicon: can achieve higher efficiencies (in the order of 42%
thanks to the multijunction (different multiple layers) in which each layer absorb
photons with different energy.
• Gallium Arsenide (GaAs): relatively high theoretical efficiency (29 %) which is
not significantly affected by temperature. Less sensitive to radiation. Gallium
makes this solution relatively expensive.
• Gallium Indium Phosphide (GaInP): similar to GaAs.
• Cadmium Telluride (CdTe): Issue: Cd is a health hazard (it is very toxic).
• Copper Indium Diselenide (CIS or CuInSe2): relatively good efficiency)
• Silicon Nitrade (N4Si3)
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The p-n junction diode
n-type substrate
Bias voltage
p-type substrate
Id
• Vd is the diode voltage
• I0 is the reverse saturation current caused by
thermally generated carriers
• At 25 C:
Vd
 0.026

Id  I0  e
 1


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Ideal diode
Real diode
I0
© Alexis Kwasinski, 2012
 qVkTd

I d  I 0  e  1


PV Cells physics
The current source
shifts the reversed
diode curve upwards
ISC
VOC
Same curve
The bias source
(voltage source)
is replaced by a
current source
powered by the
photons
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ISC
p-n junction is
equivalent to
a diode
© Alexis Kwasinski, 2012
Reverse v-i
curve for the
diode
PV Cell steady state characteristic
• From Kirchoff’s current law:
I PV  I SC  I d  I SC
 qVkTd

 I 0  e  1


• The open circuit voltage is
VOC  V ( I PV

kT  I SC
 0) 
ln 
 1
q  I0

Maximum power point
Power
P  I PVVPV
Pmax  0.7 • Voc • Isc
Current
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PV Cell steady state characteristic
• Dependence on temperature and insolation:
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PV Cell steady state characteristic
• More on the dependence on temperature and insolation:
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More complex steady-state models
• For a more realistic representation we can consider the following (equivalent
to a diode’s model):
• 1) Effect current leakage
slope 
ISC
Rp
I PV  ( I SC  I d ) 
V
Rp
• 2) Effect of internal ohmic resistance
+
Vd
ISC
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RS
 qVkTd

 I 0  e  1


+
I PV  I SC
V
where
Vd = V+IRS
This is a transcendental
equation
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© Alexis Kwasinski, 2012
V  IRS
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Rp
PV more complex steady-state model
• Both effects can be combined to obtain the more realistic (and complex)
steady state model:
+
ISC
Rp
RS
Vd
-
I PV  I SC
+
V
-
d
 qV
 Vd
kT
 I 0  e  1 

 Rp
where
Vd = V+IRS
This is a transcendental
equation
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Dynamic effects
Capacitive effect
• As with any diode, there is an associated capacitance. However, this
capacitance is relatively small, so the effects on the output can often be
neglected. Therefore, PV modules can follow a rapidly changing load very well.
•One undesirable effect of the capacitance is that it makes PV cells more
susceptible to indirect atmospheric discharges.
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Modules combination
• PV cells are combined to form modules (panels). Modules may be combined
to form arrays.
More modules (or cells)
in series
More modules (or cells)
in parallel
• When modules are connected in
parallel, the array voltage is that of the
module with the lowest voltage.
•When several modules are connected
in series to achieve a higher array
voltage, the array’s current equals that of
the module delivering the lowest current.
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Shading
(Rp+Rs)(n-1)Imodule
• A shadowed module
degrades the performance of
the entire array
+
+
One module with 50%
shadow
One module with 100%
shadow
(n-1)Vmodule
Two modules with 100%
shadow
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Bypass diode for shadowing mitigation
• Bypass diodes can mitigate the effects of shadows but they don’t solve the
issue completely.
• A better solution will be presented when discussing power electronics
interfaces.
No shade
Shaded without
bypass diode
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Shaded with
bypass diode