Transcript C/BE[3::0]
PCI & PCI-E Sephiroth Kwon GRMA 2009-05-26 PCI Outline • • • • Diagram Signal Description Repair Flow Chart Repair Technique PCI PCI Diagram PCI BUS South Bridge Clock Signal Clock Gen. PCI SLOT PCI Diagram RN PCLK1 B76 PCLK2 PCLK3 Clock Gen. C Clock Circuit B76 C B76 C PCI 1 PCI 2 PCI 3 Signal Description Address & Data Interface Control Error Reporting Arbitration System AD[31:0] C/BE[3:0] PAR FRAME# IRDY# TRDY# STOP# DEVSEL# IDSEL PERR# SERR# REQ# GNT# CLK# RST# PCI Compliant Device AD[63:32] C/BE[7:4]# PAR64 REQ63# ACK64# LOCK# INTA# INTB# INTC# INTD# SBO# SDONE TDI TDO TCK TMS TRST# Voltage and Clock • 1.Check Voltage： 2.Check Clock： Pin# Voltage Pin# Voltage Pin# Frequency A2 +12V B1 -12V B16 33MHz A5 +5V B5 +5V A8 +5V B6 +5V A10 +5V(I/O) B19 +5V(I/O) A16 +5V(I/O) B25 +3.3V A21 +3.3V B31 +3.3V A27 +3.3V B36 +3.3V A33 +3.3V B41 +3.3V A39 +3.3V B43 +3.3V A45 +3.3V B54 +3.3V A53 +3.3V B59 +5V(I/O) A59 +5V(I/O) B61 +5V A61 +5V B62 +5V A62 +5V A mean “Left”, B mean “Right” AD Signal Pin Name Pin# Diode Mode Sample Pin Name Pin# Diode Mode Sample AD[00] A58 .317 AD[16] A32 .317 AD[01] B58 .319 AD[17] B32 .319 AD[02] A57 .321 AD[18] A31 .321 AD[03] B56 .318 AD[19] B30 .318 AD[04] A55 .319 AD[20] A29 .319 AD[05] B55 .321 AD[21] B29 .322 AD[06] A54 .319 AD[22] A28 .319 AD[07] B53 .317 AD[23] B27 .318 AD[08] B52 .319 AD[24] A25 .317 AD[09] A49 .321 AD[25] B24 .319 AD[10] B48 .317 AD[26] A23 .321 AD[11] A47 .319 AD[27] B23 .323 AD[12] B47 .321 AD[28] A22 .319 AD[13] A46 .323 AD[29] B21 .321 AD[14] B45 .318 AD[30] A20 .319 AD[15] A44 .317 AD[31] B20 .318 Control Signal • 1.Check Control Signal： Pin Name Pin# FRAME# A34 IRDY# B35 TRDY# A36 STOP# A38 DEVSEL# B37 IDSEL A26 A mean “Left”, B mean “Right” (1)System Pins • CLK – All other PCI signals, except RST#, INTA#, INTB#, INTC#, and INTD#, are sampled on the rising edge of CLK and all other timing parameters are defined with respect to this edge. • RST# – Anytime RST# is asserted, all PCI output signals must be driven to their initial state. RST# may be asynchronous to CLK when asserted or deasserted. (2) Address and Data Pins • AD[31::00] – A bus transaction consists of an address phase followed by one or more data phases. PCI supports both read and write bursts. • C/BE[3::0]# – During the address phase of a transaction, C/BE[3::0]# define the bus command. During the data phase, C/BE[3::0]# are used as Byte Enables. (3)Interface Control Pins • FRAME# (Cycle Frame) – Driven by the current master to indicate the beginning and duration of an access. • IRDY# (Initiator Ready) – Indicates the initiating agent’s (bus master’s) ability to complete the current data phase of the transaction. • TRDY# (Target Ready) – Indicates the target agent’s (selected device’s) ability to complete the current data phase of the transaction. • DEVSEL# (Device Select) – Indicates the driving device has decoded its address as the target of the current access. • STOP# – Indicates the current target is requesting the master to stop the current transaction. • IDSEL (Initialization Device Select) – Chip select during configuration read and write transactions. (4)Arbitration Pins • REQ# – Indicates to the arbiter that this agent desires use of the bus. This is a point-to-point signal. Every master has its own REQ#. • GNT# – Indicates to the agent that access to the bus has been granted. This is a point-to-point signal. Every master has its own GNT#. (5)Interrupt Pins • Interrupts on PCI are optional and defined as “level sensitive”, “active low”, using open drain output drivers. • INTA# : – Interrupt A is used to request an interrupt. • INTB~D# : – Interrupt B~D are used to request an interrupt and only has mean on a multi-function device. Repair Flow Chart START Visual Inspection check PCI pin is not bent or damaged. NG Change any damaged PCI connector NG Check PCI Voltage 12V.12V.5V.3V.3VSB OK OK Measure PCI Voltage OK Measure PCI Clock NG Check PCI CLK 33Mhz NG Check AD0~31, compare with good MB OK Fix any trace open or RLC damaged OK NG NG Check RST#,FRAME#, DEVSEL#,IRDY#..... OK Remove NG Device under PCI /Change SB Fix any trace or RLC damaged, change NG CLK Generator NG OK Measure PCI control signals OK NG OK Measure PCI AD signals Fix any trace open or RLC damaged Fix any trace open or RLC damaged NG Finished OK Repair Technique-Visual Inspection Visual Inspection to check the PCI connector is no pin bent or broken. 1 Repair Technique-Measure PCI Voltage Use Multi-Meter to measure PCI related voltages (+12V, -12V,5V,3.3V) 2 Repair Technique-Measure PCI Clock Use Oscilloscope to measure PCI Clock =33Mhz 3-1 3-2 Repair Technique- Measure PCI other signals Use Multi-Meter to measure other PCI signals: AD0~AD31(refer to P16)& control signals ( FRAME#, IRDY#, TRDY#.......(refer to P17) 4 Compare with good MB. If find error trace the connection to find any trace open or short. If cannot find the root cause please try to remove other component under PCI bus and change PCI controller-SB. PCI-E Outline • • • • Diagram Signal Description Repair Flow Chart Repair Technique PCI-E PCI-E X16 Diagram-1 North Bridge B8,A9,A10 +3V B10 +3VSB B1,B2,B3,A2,A3 +12V PCI-E *16 SLOT PCI-E X16 Diagram-2 R Clock+ A13 Clock- A14 Clock Gen. Clock Circuit PCI-E *16 PCI-E X1 Diagram +12V (B1,B2,B3) +12V (A2,A3) +3VSB (B10) +3V (A9,A10) +3V (B8) Clock (A13,A14) PCIE*1 North & South Bridge Repair Flow Chart START Visual Inspection check PCI-E pin is not bent or damaged. NG Change any damaged in PCI-E connector NG Check PCI Voltage 12V.3V.3VSB OK OK Measure PCI-E Voltage Fix any trace open or RLC damaged OK OK NG NG Measure PCI-E Clock Check PCI-E CLK 100Mhz Fix any trace or RLC damaged, change NG CLK Generator OK OK NG NG Measure PCI-E TX /RX signals Check TX /RX signals, compare with good MB Fix any trace open or RLC damaged NG OK OK Change NB(PCI-EX16) or SB(PCI-EX1) Finished OK Repair Technique-Visual Inspection Visual Inspection to check PCI-E connector is not damaged or bent pin inside. 1-1 1-2 Repair Technique-Measure PCI-E Voltage Use Multi-Meter to measure PCIE working Voltages—12V, 3V, 3VSB. 2-1 P.S. We can use PCI-E X16 Signals Pin Out card to measure. P/N: 08-900036900 Name: ENG_PCI-E PIN NAME R1.00 2-2 Repair Technique- Measure PCI-E Clock Use Oscilloscope to measure PCI-E CLK =100Mhz 3-1 3-2 Repair Technique-Measure PCI-E TX/RX signals Use Multi-Meter to measure PCI-E TX/RX signals, compare with good MB. If find error please trace the circuit to check related trace & RLC components. 4-1 If still can’t find any abnormal please try to change NB (PCI-E X16 controller) or SB (PCI-E X1 controller). 4-2 Thank You!