Time Jitter and Digital Systems FCS2005

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Transcript Time Jitter and Digital Systems FCS2005

A Review of Time Jitter and
Digital Systems
Victor S. Reinhardt
Raytheon Space and Airborne Systems
El Segundo California
Presented at
The 2005 Joint IEEE International Frequency Control
Symposium and Precise Time and Time Interval
(PTTI) Systems and Applications Meeting
(Paper to be Published in Proceedings)
The Hyatt Regency Hotel, Vancouver, Canada.
August 29-31, 2005
Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source
reference is listed on each page, section, or graphic utilized.
Introduction — Overview
• Time jitter is an important parameter for determining the
performance of digital systems
• This paper will review the mechanics how time jitter
impacts the performance of such systems
~ Agenda ~
• Introduction & overview
• A statistical framework for later discussions
• Discuss time jitter impact by category of digital system
• Conclusions-Summary
Note: This presentation has been updated based on audience
comments
Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source
reference is listed on each page, section, or graphic utilized.
A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Page 2
Categories of Digital Systems for
Discussing Impact Time Jitter
• Categories somewhat overlap
• Synchronous data transfer
– Common clock distributed along with data
– Cancels most direct effects from clock oscillator
– Gate timing jitter generates bit errors
• Asynchronous data transfer
– Only data distributed & local clocks regenerated
– Includes digital communications systems
– Additional bit errors caused by relative
Synchronous
Dig
Data
Clock
Asynchronous
Dig
Data
master-local clock oscillator (MO-LO) jitter
• Digital sampling
Dig
Clock
PLL
Clock
– Analog signals are sampled & digitized or visa
versa
– A/Ds & D/As: Sampling clock jitter generates
noise power
– Communications systems decision circuits:
Sampling clock jitter causes bit error rate (BER)
degradation
Dig
Digital sampling
Analog
Voltage
Digital
A/D
Data
Clock
Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source
reference is listed on each page, section, or graphic utilized.
A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Page 3
Types of Degradation Caused by Time
Jitter
Hard Errors
Data Window
Data
Clock
Time Jitter Causes Data
Transfer Errors
Soft Errors & Noise Power
V
Time Jitter
Causes BER
Degradation
V
&
t
Generates
Noise Power
Cloc
k
• Hard bit errors
– Direct bit errors without any other factors
involved
– Data clock jitter moves clock edge out of
correct data transfer window
• Soft bit errors (BER degradation)
– Increase in BER when thermal noise is
present (no errors when no thermal noise)
– Occur in symbol (or bit) decision circuits
which turn an analog signal into digital
symbol stream by sampling
– Clock jitter causes BER degradation by
generating variations in sampled signal
• A/D & D/A noise power
– Sampled voltage noise caused by time
jitter induced variations
– This noise power decreases the effective
number of bits (ENOB) of A/Ds & D/As
Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source
reference is listed on each page, section, or graphic utilized.
A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Page 4
Defining Time Error in Digital
Systems
Data Transfer
Skew
Data
Clock
• Two definitions of time error
– Data transfer: Time error is between data
clock edges & data symbol centers
– Digital sampling: Time error is between
sampling clock edges and correct analog
epoch
• Time error broken into two components
Jitter
Error
Digital Sampling
Jitter
– Skew = average error
• Fixed plus long term and environmental
changes
• Usually measured by an N-sample mean
– Jitter = short term variation
• Specified as RMS, peak, or peak-to-peak
V(t)
relative to skew
• RMS usually interpreted as N-sample
standard deviate
t
Skew
Error
Total Time Error
= Skew + Jitter
• Bit errors function of total error so jitter
must reference skew
• Noise power caused by jitter alone so
reference to skew not important (Skew
important for sampling accuracy)
Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source
reference is listed on each page, section, or graphic utilized.
A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Page 5
A Statistical Framework
for Time Jitter & Digital Systems
Background for Statistical Approach Chosen
• Digital community has historically dealt with time jitter using
stationary statistics
– The standard variance generally used as the jitter measure
– Bandwidth (BW) and non-stationary noise (1/f n noise) issues often not
explicitly dealt with
– Become important to treat BW & 1/fn issues explicitly because time jitter
requirements now in ps & sub-ps regions
• Precise time community has historically dealt with BW & 1/f n issues
using 2nd difference measures of jitter
– But these 2nd difference measures not easily connected to the skew
• The statistical framework presented here will attempt to meld both
approaches
– Will use the standard variance as jitter measure because it directly
references the skew
– Will rigorously deal with BW and 1/f n noise issues
– Will show that the standard variance can be used with 1/f n noise
because of unique properties of digital systems
Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source
reference is listed on each page, section, or graphic utilized.
A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Page 6
Definition of Two Associated Time
Error Variables
• Clock reading (normalized phase)
Subject
Clock
Reading
error
V(t) = A(t)F(wot+ f(t))
f
x
t
– Difference between subject and
reference clock readings at same
time
– x(t) can be considered continuous
variable--derived from f(t)
– Will use x in presentation
t’n
t
Vref(t) = AoF(wot)
• Time (zero crossing) error
tn
fref = 0 By
Definition
F(.) = Periodic
Function
Basic Clock
x(t) = f(t)/wo
t
Ref
Clock
Reading
Clock
Reading
fo
= Cycles
in 1/fo
Freq Source Cycle Counter units
t(tn) = t’n – tn  – x(tn)
– Difference between subject and
reference clock edges
at same cycle or period count
– Is approximately the negative of x(tn)
• x(t) is the derivative of the fractional
frequency error
y = f/fo = dx/dt = - d(t)/dt
– x preferred because no minus sign
Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source
reference is listed on each page, section, or graphic utilized.
A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Page 7
Discrete Samples xn and Jitter
Measure
Continuous
x(t) =
f(t)/wo
xn 
N Discrete
Samples
xn
Spaced
by 
System
Response
Phase
hs(t)
 dt x(t)h (n  t)
s
• N samples xn spaced by interval 
• xn derived from convolution of
continuous x(t) with explicit system
phase response function hs(t)
– Explicit use of hs(t) will be important
• Skew = N-sample arithmetic mean
• Jitter measure will be N-sample
M x ( N)  N 1
 2xd (, N)

1

 (x n  M x ) 2 
N  1 n 1
x
n
n 1
unbiased standard variance
N
N
Ensemble
<…> = Average
– Ensemble average of the arithmetic mean of N squared
1st differences between xn and skew Mx(N)
– Has well known convergence problems for 1/f3 noise
– Will show is mitigated in digital systems by hs(t)
Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source
reference is listed on each page, section, or graphic utilized.
A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Page 8
Closest 2nd Difference Variance For
Comparison
 2xa (, N)
1

4( N  1)
2
x N  x1 

  x n 1  x n 
 
N 
n 1 
N

• Ensemble average of arithmetic mean of N squared
2nd differences of xn’s
• More familiarly written in terms of N-sample fractional frequency
Allan variance 2y(N,,) *
 2xa (, N)
0.25

N 1
2
1
y n   (x n  x n 1 )
N

( y n  M y ) 2  0.25 2  2y ( N, , )
n 1
M y  N 1
• Well behaved for
noise
• But eliminates direct reference to skew Mx(N)
1/f3
N
y
n
n 1
* See: B. E. Blair, Ed, Time and Frequency Fundamentals, NBS Monograph 140, U. S. Govt. Printing office,
1974 (CODEN:NBSMA6), p 166.
Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source
reference is listed on each page, section, or graphic utilized.
A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Page 9
Spectral Integral of Variances
2xd(,N) & 2xa(,N)
System
Response
|Hs(f)|2
Variance
Kernel
Kx(f)
System
Properties
Variance
Properties
Sx(f)
 x2
Sx(f) (double
sideband PSD)
Hs(f) can
have LF
cut-off
|Hs(f)|2Kx(f)
Integration
Region
Frequency from Carrier f
 2x



0
Sx (f ) | Hs (f ) |2 K x (f )df
• Kernel Kx(f) = Kxd(f) or Kxa(f)
Describes the variance
– Why a kernel? Kx(f) for N samples
cannot be represented by the square of
a single response function
• Sx(f) = Double-sideband (DSB)
power spectral density (PSD) of
x(t) Describes the noise
– Lx(f) = ½Sx(f) = SSB PSD
• Hs(f) = DSB Fourier transform of
hs(t) Describes the system
– System assumed linear in phase
– Hs(f) can contain high & low
frequency BW cut-offs
Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source
reference is listed on each page, section, or graphic utilized.
A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Page 10
Kernels of 2xd(,N) & 2xa(,N)
• Standard Variance 2xd(,N)
Kxd & Kxa vs f
f = 1/N
dB
10
0
-10
-20
-30
-40
-50
-60
-70
Kxd
 f2
 f2
Kxa
 f4
-6 -5 -4 -3 -2 -1 0 1
Log(f)
(N=100)
N 
1 sin2 ( Nf) 
K xd (f ) 
1  2

2
N  1  N sin (f) 
– For Nf << 1: Kxd(f)  f2
– Converges for Sx(f) = 1/f0 … 1/f2
– Also converges for 1/f3 & 1/f4 if Hs(f)
contains appropriate highpass filter
• 2nd Difference Variance 2xa(,N)
2

N
sin
( Nf) 
2
K xa (f ) 
sin (f)1  2 2

N 1
 N sin (f) 
– For Nf << 1: Kxa(f)  f4
– 2xa converges for Sx(f) = 1/f0… 1/f4
Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source
reference is listed on each page, section, or graphic utilized.
A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Page 11
Properties of 2xd(,N) as N  
• When N  
Kxd  1
and 2xd(,N)  Single point standard variance 2x-std
2xd (, N)
 2x std
  (x n   x n )  
2


0
df | Hs (f ) |2 Sx (f )
– Again 2x-std can exist for 1/fn noise because of |Hs(f)|2
– When there are mathematical difficulties with 2x-std
can fall back on 2xd(N) with large but finite N
• |Hs(f)|2 often approximated by square bandpass filter
– Then
2x std
 2x bpass
– fl = low frequency cut-off


fh
fl
df Sx (f )
– fh = high frequency cut-off
Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source
reference is listed on each page, section, or graphic utilized.
A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Page 12
Impact of Time Jitter on Digital
Systems by Category
• Will use framework just presented to discuss impact by
category
– Synchronous data transfer systems
– Asynchronous data transfer systems
– Digital sampling systems
• Will show that 2xd(, N) & 2x-std can be used because of
properties of these systems
Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source
reference is listed on each page, section, or graphic utilized.
A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Page 13
Time jitter & Synchronous Systems
Digital
Subsystem Data
Common Clock
Digital
Subsystem
Delay m
Common Clock Oscillator
Frequency = fo
Gate Noise BW = fg
• Common clock oscillator distributed to all units
– Cancels most direct clock oscillator effects
– There is some residual high pass filtered oscillator noise
due to time misalignment between clocks
• Hs(f) = 4sin2(wm)  f2 for fm << 1
• Both gate and residual oscillator noise can be modeled by white
plus 1/f noise terms
Sx(f) = g0(1 + fk/f)
– fk = 1/f or flicker knee  freq where 1/f noise PSD = white noise PSD
• Hs(f) can be approximated by square lowpass filter
– fl = 0
– fh = fg = gate noise bandwidth
• Note fh is not equal to fo the clock frequency but fg
• Usually fg >> fo so aliasing of white noise is a major issue
Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source
reference is listed on each page, section, or graphic utilized.
A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Page 14
Aliasing of White Noise in Digital
Systems
Sx(f)
Sx multiplied by
(fg/fo) due to aliasing
Original Sx(f)
fo
2fo 3fo . . . . fg
Freq from carrier
Analog
noise
Sampled noise
has same  in BW fo
To
2To 3To . . . nT0
Clock Cycles
• Aliasing occurs because discrete digital system is equivalent to
system sampled at fo
– Logic sees noise frequencies up to fh = fg (and fg >> fo)
– The sampling aliases the original Sx(f) over BW fg into BW fo
– This aliasing multiplies white Sx(f) by factor of fg/fo
• Aliasing can also impact counter measurements
because of large counter fh compared with fo
– Counter fh may be much higher than gate BW fg
Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source
reference is listed on each page, section, or graphic utilized.
A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Page 15
For Synchronous Systems
1/f Effects are Negligible
• For Sx(f) = g0(1 + fk/f) can calculate 2xd(, N)
2xd (, N)  f k g o ln(Nf g )  f g g o
[N >>1]
• Time Tk = N where 1/f noise term = white noise term given by
Tk  N 
fg / fk
e
f g
• For all logic types Tk >>> Life of universe
and 1/f noise can be ignored for all practical N values
• Thus for synchronous systems need use only white noise
component of Sx(f)
2xd (, N)  2xstd  f g go
Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source
reference is listed on each page, section, or graphic utilized.
A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Page 16
Time Jitter & Asynchronous Systems
(Shown as Communications System)
Transmitter
Link Response Hh(f)
Receiver
Modulated
Tx
ModTx
Rx
De- DeciRx
Digital ulator Filter
Filter Mod sion Digital
Data
Clock Master
Clock Local Clock Recovery PLL
Osc (MO)
Osc (LO)
Hp(f)Loop BW = Bp
• Data sent between units without clock *
– Clock recovery phase locked loop (PLL) regenerates clock & tracks Rx
clock LO to Tx clock MO
– Because of this there is additional MO-LO clock oscillator jitter
• System response has two components
– Clock recovery PLL response Hp(f)--provides low frequency cut-off at
loop BW Bp
– Tx-Rx link response Hh(f)--provides high frequency cut-off
• fh  Rs/2 (Rs = Symbol rate) for communications systems
• Also other asynchronous systems such as RS-422
– fh less easily specified (Worst case fh = fg)
* See: Victor S. Reinhardt, The Calculation of Frequency Source Requirements for Digital Communications Systems,
Proceedings of the IEEE International Frequency Control Symposium 50th Anniversary Joint Conference, 24-27
August, 2004, Montréal, Canada. Slides at http://www.ieee-uffc.org/freqcontrol/Reinhardt_files/frame.htm
Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source
reference is listed on each page, section, or graphic utilized.
A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Page 17
Standard Variance for MO-LO Jitter
 2x std



0
S x (f ) | 1  H p (f ) | | H h (f ) | df 
2
2

fh
Bp
S x (f )df
• Sx(f) = sum of PSD’s of all oscillators
Sx(f) (Sum of all Clocks )
|1-Hp(f)|2|Hh(f)|2
 f4 for
2nd
Order
PLLs
Variance
Integration
Region
fl = Bp
Frequency from Carrier f
fh
in Tx-Rx link
• Hp(f) = clock recovery PLL response
function
• Hh(f) = DSB complex envelope
response function of Tx-Rx link
• |1 – Hp(f)|2 provides LF cut-off at PLL
loop BW Bp
– 2nd PLL will cancel 1/f3 noise completely
– 1st order PLL will leave residual 1/f
for 1/f3 Sx(f)
• But has negligible effect on 2xd (,N)
(See synchronous systems)
• However susceptible to cycle slipping
• |Hh(f)|2 provides high freq cut-off fh
Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source
reference is listed on each page, section, or graphic utilized.
A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Page 18
Time Jitter & Digital Sampling
• Time jitter generates random variations in sampled voltage
• In communications systems decision circuits
– Random voltage variations interact with thermal variations
to produce BER degradation
– BER degradation is derived using a Gaussian xn with 2x-std
from asynchronous transfer
– Time jitter requirements approach 1 ps at > GHz symbol rates
Timing Skew
RMS Jitter Reqs for QPSK
@ 0.1 dB BER Deg
Jitter - log(sec)
Time Jitter &
Digital Sampling
Time
V(t)
Jitter
Generates
Random
1-bit
Variations
t
in
Sampled
0-bit
Voltage
-5
-6
-7
-8
-9
-10
-11
-12
30 40 50 60 70 80 90
Symbol Rate - dBHz
Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source
reference is listed on each page, section, or graphic utilized.
A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Page 19
In A/Ds & D/As Time Jitter
Generates Noise Power
•
•
Noise power consists of random variations in sampled voltage
generated by slope modulation of signal
Sinewave (SW) Signal
For sinewave signal *
V(t) = A sin(w t+ f)
SNRjitter-1  f2 = ws2 x-std2 = V2/Ps
– fh = fg unless otherwise restricted
– Note SNRjitter is independent of
number of digitized bits
– Means SNRjitter reqs more severe as
s
Near Zero: f = wsx = V/A
- ws = 2fs =SW Ang freq
- Ps = SW power = A2/2
- fo = Sampling clock
freq
number of bits increases
•
Can convert SNRjitter to an ENOB by
– By equating SNRjitter to quant error SNR
– And assuming a given signal power level
• Voltage PSD for white-x noise
SV(f)  (fh/fo) ws2goPs (x-std2 = fhgo)
2A
Noise
Power V
x
Time
Jitter
f
Phase
Jitter
* see: Analog Devices, Mixed-Signal and DSP Design Techniques, Section 2, Sampled Data Systems,
http://www.analog.com/Analog_Root/static/pdf/dataConverters/MixedSignal_Sect2.pdf, p35
Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source
reference is listed on each page, section, or graphic utilized.
A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Page 20
ENOB Limits from Time Jitter
Generate Stringent Requirements
120
20
18
16
14
12
10
8
6
SNRtot-dB - dB
100
80
60
40
20
ENOBtot for 10 dB BO
• ENOBtot values generated from *
6 7 8 9 10
Log10(SW Freq – Hz)
* Differs from ENOB defined in
other sources which use full
scale signal level
– 10 dB BO more realistic
– Signal level @ 10 dB back-off (BO)
from full scale (FS)
• Typical BO for complex signals
– SNRtot = 2SNRjitter = SNRquant
• Assumes SNRjitter = SNRquant
Jitter
1 ps
0.1 ps
ENOB SW Freq SW Freq
tot
MHz
MHz
16
4
44
12
71
709
10
284
2838
8
1135
11351
• Is major limiting issue for
high speed A/Ds and D/As
(& conservative)
Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source
reference is listed on each page, section, or graphic utilized.
A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Page 21
Noise Power & Non-White noise
• For non-white noise the appropriate 2xd(,N) & 2x-std can be
generated as follows
• Synchronous sampling system
– Sampling clock derived directly from the analog signal clock
– See 2x-std from synchronous data transfer
• Asynchronous sampling system
– Sampling clock locked to analog signal clock though PLL (or equivalent)
– For MO-LO jitter see 2x-std from asynchronous data transfer
– For gate jitter see 2x-std from synchronous data transfer
– Total variance is sum of the above
• Unsynchronized sampling system
– Independent sampling and signal clocks
– For up to 1/f2 noise can use 2xd(,N)
– There will be divergence and accuracy issues from 1/f3 noise unless there
is calibration in system that has implicit low frequency cut-off
Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source
reference is listed on each page, section, or graphic utilized.
A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Page 22
Conclusions--Summary
• Should explicitly use system response hs(t) so standard variances
2xd(,N) & 2x-std can be used with 1/fn noise
• For synchronous transfer need only use white noise component of
Sx(f) for 2xd(,N) & 2x-std
– Common clock cancels out oscillator 1/f2 and 1/f3 noise
– 1/f noise term negligible compared with white noise term
– Aliasing significantly increases white noise PSD
– Time jitter causes hard errors
• For asynchronous transfer there is an additional MO-LO jitter term
– Has oscillator 1/f2 and 1/f3 noise components
– PLL loop BW provides LF cut-off so 2xd(,N) & 2x-std exists
– Time jitter also causes BER degradation (soft errors)
• Noise power in digital sampling (A/Ds & D/As)
– Limits effective number of bits (ENOB)
– Clock jitter is critical limitation on high speed A/D & D/A performance
Copyright 2005 Victor S. Reinhardt--Rights to copy material is granted so long as a source
reference is listed on each page, section, or graphic utilized.
A Review of Time Jitter and Digital Systems-Victor S. Reinhardt Page 23