Transcript Galt Design PID controller

FPGA PID Heater/Cooler
Controller
Galt Design, Inc.
Copyright 2006 - Galt Design, Inc.
Short Description
• PID control of Heater or TEC* through PWM pulsing
• Takes input from Thermistor after ADC for temperature information
• PID, deadband, integrator_limit, ramping settings available
• Available in both Verilog and VHDL HDL code
• Can be used in both FPGA and ASIC designs
* TEC is Thermo Electric Cooling device. It uses the Peltier effect to both heat and cool.
Copyright 2006 - Galt Design, Inc.
Example PID Thermal controller FPGA
Done Interrupt
PID Thermal
controller FPGA
Example
Set point, parameters
CPU interface
1
PID Controller
8
Copyright 2006 - Galt Design, Inc.
Serial to parallel
1
2
Heater
TEC
Thermisters ADC
PID Thermal Control Diagram
Derivative
Gain Register
*
Temperature
Setpoint
Register
-
D term
Integral Gain
Register
Error
Accumulator
Voltage to
Temperature
LUT
Copyright 2006 - Galt Design, Inc.
*
*
Proportional
Gain Register
I term
P term

PWM pulses to
Heaters/TECs
Thermistor
ADC output
FPGA Code Organization
U_htrio(heater_io_control.v)
Copyright 2006 - Galt Design, Inc.
U_adc(adc_control.v)
U_loop_tec0(loop_controller.v)
U_loop_ht0(loop_controller.v)
U_profile_buf(afiforam_256x16)
conv_lut(dpbram_4096x16)
Contact information
Contact us with questions or for a quote:
[email protected]
Copyright 2006 - Galt Design, Inc.