Transcript psas.pdx.edu

2005/06 Capstone Avionics Systems
Team Project
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Project Title: The Node
Front End design for
the PSAS LV2b
Avionics System
Members:

Sarah Bailey

Jacob Davidson

Glenn LeBrasseur
Date: 2006-2-3
2005/06 Capstone Project Team
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Team members:
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Sarah Bailey
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Jacob Davidson
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Glenn LeBrasseur
Industry sponsor:
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Andrew Greenberg
Faculty advisor:
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Mark Faust
Who are our customers?
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Our single customer is the Portland State
Aerospace Society (PSAS)
PSAS is currently in the process of designing
their fourth rocket or launch vehicle (LV) titled
LV2b
Our Capstone Team will produce the interface
electronics of all of the LV's avionics systems
Redesign of a network based open
avionics system
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What is it?
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Why is it needed?
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To ensure the integrity of the data the rocket generates and
its safe recovery from a flight, all systems within the rocket
must reliably interface with each other
What needs to be done?
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The common electronics which will control the interfacing of
the various LV avionics systems
Design and build the interface circuitry
What will be produced?
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A two-layer PCB containing the electronics implementing the
interface
Who is the Portland State Aerospace
Society (PSAS)?
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Founded in 1997
First US student chapter of the Aerospace and
Electrical Systems Society (AESS) which is a
technical society of the Institute of Electrical and
Electronics Engineers (IEEE)
As far as the group knows, they are the most
advanced amateur rocket group in the world
PSAS designs, builds and launch amateur
rockets or launch vehicles (LV) into the lower
atmosphere
What is the purpose of PSAS and
their objectives?
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Pioneering active guidance and open source
software and hardware aerospace systems
Long term goal:
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Design, build and put a “nanosatellite” into Earth
orbit
What are the future plans for PSAS?
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Design their fourth rocket, LV2b, which will be a
research platform for active guidance
The rocket will consist of a network of nodes,
each doing a specific function
The following is the block diagram of the LV2a
avionics system:
We are going to redesign the old
node interface of each node
LV2b nodes
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MASTER NODE: Flight Computer (FC)
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Amateur TV (ATV)
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Inertial Measurement Unit (IMU)
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Global Positioning System/Satellite (GPS)
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Environmental Sensors
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Magnetometer
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Recovery Node
Where does the Capstone team fit
into PSAS plans?
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We are in charge of designing the common
electronics that run all of the avionics nodes
Called a node front end, it includes:
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32-bit microcontroller
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Switching power supply
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Communication bus interface
Block diagram of LV2b Node Front
End
LV2b Avionics Node
Switching power
supply
32-bit
microcontroller
Power
bus
Comm bus
Node Front
End
Application specific
circuits (e.g. IMU,
GPS)
What are the deliverables required
of the Capstone Team?
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Design of the node front end
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Schematic capture and PCB layout
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Design notes
Front End prototype which includes:
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Commercially built two-layer PCB
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Populated and tested components
A white paper of the node front end design
What is the Node Front End?
(Example: Recovery Node)
What is the Node Front End?
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Designed for PSAS
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Used with every Avionics Node
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Communications relay
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Local processor for sensor data
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Supplies power
Node Front End Environment
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Rocket Environment:
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-5o C to +40o C
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Intense vibration
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Acceleration up to 20 g
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EMI (10MHz to > 2.4GHz)
Test Environment
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frequent handling and transport
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frequent power and communications
connect/disconnect
Front End Constraints
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Should be < $150
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Must be very robust
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Immune to EMI
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1" x 2" in size
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< 0.5" thick
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Power consumption <= 190mW
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Condition power bus (10-20V) to required
voltages for the node
Parts Constrains
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Parts should be
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surface mount
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able to be routed on a two-layer board
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connectors should lock down during flight
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Board may have a conformal coating
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Redundant external connectors
Reproducibility
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COTS components
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open source or free software
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documentation
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PSAS wiki
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design notebook
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white paper
Power Supply Requirements
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must condition 10V to 20V input to required
node voltage
> 70% efficiency
EMI from supply should not interfere with other
systems
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external shutdown control
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undervoltage lockout
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overvoltage protection
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current limited
Communications Bus Hard
Requirements
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Must handle
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shorts and opens on PHY layer
acceleration and vibration
Must prioritize messages
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EMI
System critical messages should be sent, even at
the expense of non-critical messages
bandwidth >= 1Mbps
Communications Bus Soft
Requirements
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“Shoulds”:
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software handling retransmission
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Faulty nodes can be shut down by FC
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previous use in critical real-time systems
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easy interface to laptops
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node controllers flashed over bus
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existing bus protocol drivers
CAN vs. USB
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differential bus
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differential bus
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1Mbps
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12Mbps
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CAN in cars
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message-by-message
prioritization
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peer-to-peer
automatic
retransmission
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USB in medical
devices
bandwidth
prioritization
mastered bus
depends on transfer
type
CAN vs. USB
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laptop interfaces
through special
hardware
PSAS members wrote
CAN drivers for PIC
no CAN drivers for
Linux or eCos
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laptop can directly
plug into the bus
local contacts who
wrote USB drivers
Linux has many USB
drivers
eCos has hardwareindependent USB
driver framework
Microcontroller Requirements
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Needs:
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32-bit, >= 128K flash, >= 32K SRAM
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> 10 MIPS (around 60 MIPS is the goal)
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OSS tools like gcc, gdb, or binutils
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open debugger protocol (e.g. JTAG)
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Usable packaging
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QFP, less than 144 pins (64 pins is ideal)
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BGA < 32 pins (with commercial mounting)
communication bus connection (USB or CAN)
Microcontroller Requirements
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Wants
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multiple implementations from more than one
manufacturer
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integer math ALU, 10 bit ADC, 3 PWM, watchdog
timer, brown out reset
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reasonable voltage requirements (3.3V only or
3.3/5V)
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existing open source RTOS, like eCos
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low power modes
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low cost