Flash Memory - School of Electrical Engineering and Computer
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Transcript Flash Memory - School of Electrical Engineering and Computer
Power Management of Flash
Memory for Portable Devices
Thayalan Selvam
Suganthan Vivekananthan
Thushitha Kanagaratnam
ELG 4135, Fall 2006
Faculty of Engineering, University of Ottawa
November 1, 2006
Outline
Introduction to Flash Memory
Why power optimization?
Dynamic Voltage Scaling
Simulation
Conclusion
Flash Memory
Non-volatile data storage devices
Storage of trapped electrons in cells
Cells have different logical functions: NOR
or NAND
NOR flash memory:- Faster read time
longer erase and write times
NAND flash memory:- Longer read time
Faster erase and write times
Usage of Flash Memory
Computer's BIOS chip
Digital cameras
Mp3 players
Memory Stick
PCMCIA Type I and Type II memory
cards
PDA
Advantages of Flash
Memory
Maintain stored information without
power source
High storage capacity and compatibility
No physical disk to spun as in hard
High processing speed:- Virtually the speed is
Compact size:- 2mm to 3mm in width
disks
same as light’s speed. Limiting factor is USB 2.0
Why Power Optimization ?
Demand for portable electronics devices
have increased
Power consumption is major obstacle in
any mobile portable devices.
Main task to maintain low power
consumption
Low power increases the performance
and makes the devices durable
Limitations on Power
Optimization
Low power consumption
Supply voltage
Clock frequency
Performance time
Circuit delay
Low cost
System Block Diagram of a
Portable Device (mp3 player)
Power Optimization
Algorithms
Dynamic Voltage Scaling
Static Voltage Scaling
Voltage Clock Scaling
Dynamic Voltage Scaling
Algorithm
Allows devices to change voltage and
speed
Uses different voltage level for program,
write and erase
Uses high voltage when the work load
is high
Uses low voltage when the work load is
low
Advantages of Dynamic
Voltage Scaling Algorithm
Advanced electronic chips allows to
have different voltage levels in devices
Intelligence power management allows
to lengthen the operational time by
operating the devices at low power
level, whenever possible
Save the battery power
Our Contributions
Literature search on various power
management algorithms
Selected one Dynamic Voltage Scaling
algorithm: Dynamic Voltage Adjustment
algorithm
We proposed a new version of existing
dynamic voltage adjustment algorithm
The performance of the new algorithm is
compared with the existing algorithm
Dynamic Voltage Adjustment
(DVA) Algorithm
NOR Flash Memory: Block read uses constant voltage
level. Power management is required only for write
and erase operations
Each tasks have deadline time
This algorithm based on Earliest Deadline First (EDF)
algorithm. That is earliest deadline tasks are
scheduled very first
First K tasks are operated at high voltage level and
rest of the tasks are at low voltage level
This algorithm make sure that K is minimized
DVA (Cont’d.)
Let S = {R1, R2 …… Rn} be the pending request for flash
memory and are arranged according to its deadline T1, T2,…Tn. Here,
T1 < T2 <…Tn
pseudo code
For i=1:n
Schedule task Ri at low voltage
Find total time
if total time > Ti
adjust first K tasks at high voltage (make sure that
k is minimized)
end
End
New version of DVA
Pseudo code of proposed algorithm
For i=1:n
Schedule task Ri at low voltage
Find total time
if total time > Ti
adjust shortest K tasks at high voltage (make
sure that k is minimized)
end
End
Simulation Set Up
Vpp
Block Write
Block Erase
Power
Consumption
Power
Consumption
Performance
Performance
5V
375 mW 0.5 S
250 mW 0.4 S
12 V
540 mW 0.4 S
480 mW 0.3 S
Considered NOR Flash memory:
- Read time is constant. Write and Erase are
considered
Block Size: 64 kb
Two levels of operating voltages: 5V and 12V
Simulation Results
(Voltage Level)
First
5
tasks
are
operated at high voltage
Rest of the tasks are
operated at low voltage
This algorithms make
sure that the number of
high voltage tasks are
minimized
Proposed algorithm set
shortest k tasks at high
voltage
Simulation Results (Power
Consumption)
This graph compares
the power
consumption of the
algorithms
Graph clearly indicates
the performance of the
DVA (Dynamic Voltage
Adjustment) algorithm
and the proposed
algorithm
However, proposed
algorithm have 6.475%
improvement compare
to existing DVA
algorithm
Conclusion
Dynamic Voltage Adjustment algorithm is
considered
The simulation results shows efficiency of the
power management algorithm
Dynamic Voltage Adjustment algorithm is
useful in the implementation of portable
devices which saves battery power
We gained a good knowledge in various
power management algorithms.
Future work!
In this context, we considered heuristic
approaches for power management and
therefore the solution is near optimum
Explore efficient optimization tools to find
exact optimal solution
Online arrival of tasks can be incorporated
Consider multi voltage levels. (This project
we have considered two voltage levels).
However, voltage levels cannot be increased
as many since the electronic circuit’s
limitations
References
[1] Tanzawa T, Takano Y, Taura T, Atsumi S. “A Novel Bit-Line DirectSense Circuit that uses a feedback system for High-Speed Flash Memory.”
Research Institute of Electrical Communication, Tohoku University,
Japan. January 2006
[2] Li-Pin Chang, Tei Wei Kuo, Shi-Wu Lo. “ A Dynamic- VoltageAdjustment in reducing the power consumption of flash memory for
portable devices.” Taipei,Taiwan.
[3] Yehua Du, Ming Cai, Jinxiang Dong. “Dynamic Voltage Scaling of
Flash Memory Storage Systems for Low-Power Real-Time Embedded
Systems.” Zhejiang University, Hangzhou, China
Thank You
Special Thanks to Dr. Habash and TA’s
for help and supports.
Questions?????