Considerations for the safe maximum energy of the - Indico

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Transcript Considerations for the safe maximum energy of the - Indico

Session: “Towards 7TeV”
Thermal amplifier and RRR
measurements: would they allow
us to 5 TeV (or higher)?
TE-MPE workshop,
14 December2010
Mike Koratzinos
Introduction
• I have been asked a series of questions from
the chairmen of the session.
• To all these questions I will answer, but I
would also need to give some background
information to the non-experts amongst you
in the audience.
Acknowledgements: This work would not be possible without the help of a great
number of colleagues, amongst which are Andrzej Siemko, Ruediger Schmidt, Arjan
Verweij, Zinour Charifoulline, Knud Dahlerup-Petersen, Reiner Denz, Bob Flora, Howie
Pfeffer, Jim Strait, Hugues Thiesen, Francesco Bertinelli, Christian Scheuerlein , George
Kourkafas, Marta Bajko, Christian Giloux, Jerome Feuvrier and others
Questions to be answered
• Status and plans for RRR measurements during 2010 X-mas stop
• What can we learn in the best case (ie can we go to 5TeV after just RRR
measurements)?
• Do we need (additional) analysis software for RRR and thermal amplifier?
• Is it essential to do the thermal amplifier measurements before the longshutdown?
• What is the best moment to do these measurements and how to do them
safely?
• Compatibility with and impact on nQPS system?
• Resources especially manpower for test and evaluation?
What is the aim of all this?
1.
2.
3.
4.
5.
6.
The aim is to run the LHC at the maximum safe energy.
A ‘bad splice’ (definition later) in the LHC, if quenched, can (and
will) lead to a thermal runaway.
A ‘bad splice’ is a function of energy of the LHC. The higher the
LHC energy, the less bad splices it can tolerate. [the definition of a
bad splice as a function of energy comes from Arjan Verweij]
The problem is that at this moment, we do not know how good
(or bad) all splices in the machine are. We have only analyzed a
sample of splices and from this sample we can make some
statements of a statistical nature about the whole machine.
Another ingredient in this calculation is how many quenches we
will get during the year. This is an unknown number and I will not
talk about it here.
Therefore currently what we can do is associate a probability of an
incident to every energy level we would like to run in the future.
Pictorial definition of a ‘bad joint’
It turns out that the limiting factor is the continuity of the copper stabilizer (and
not the soldering of the s/c cables). This is something that can only be measured
at warm.
Solder
No solder
wedge
bus
Solder
U-profile
bus
No solder
wedge
bus
Solder
U-profile
bus
No solder
wedge
bus
U-profile
Remnants of solder/oxidation
bus
Note that a
‘slightly better
joint’ can
deteriorate
with time!
What can we do to improve the
situation?
• Run a qualification tool that would determine
the exact energy where a joint (the worst in
the machine) would start running away 
Thermal Amplifier
• Increase the knowledge of the copper
stabilizer joints  RRR measurements. A joint
with a high Residual Resistivity Ratio is safe up
to a higher current.
RRR measurements
• Sectors 56, 67 measured, rest to come (Type
test last February)
Very very preliminary
RRR RB and RQ S56
400
350
Patches reveal a correction of
15% to 35% for RB, pushing the
RRR higher!
300
250
RRR - RB
200
RRR - RQ
150
100
50
0
50
100
150
200
250
Average RRR RB: 200
Average RRR RQ: 270
Difference: about 35% - Why?
300
correction due to low impedance
0.0012
0.001
0.0008
0.0006
0.0004
0.0002
0
Hot off the press! – fresh measurements
1.1
1.15
1.2
1.25
ratio resistance normal/patch
1.3
1.35
The Thermal amplifier
• A typical bad joint (50uOhms at room temperature) is about 2.5% of
the resistance of a bus bar segment for the RB and 0.5% for the RQ.
• By provoking a controlled, safe, thermal runaway its resistance
would increase 100-fold if its temperature increases by 300K –
much easier to measure.
• There is a series of technical challenges that need to be solved.
They need close collaboration from many groups of the TE
department:
– The DFBs need to be cooled to 4.5K, whereas the rest of the arc would
be at a higher temperature (30 to 40K) (CRG group)
– The voltage budget of the power converters used should be
appropriate(EPC group)
– Safety should be ensured either with a very robust procedure or with
an interlock (QPS, MPE group)
The thermal amplifier proof of
principle test
V4_5 contains the defect. V2_3
and V3_4 are perfect busbars
Defect machined out of the bar – its
resistance at warm is 50uOhms
Thermal amplifier – a possible project
• Scope: to prepare the concept and take the measurements, possibly
during the next Xmas technical stop
• Two phases: feasibility (~ 7 months), production (~ 3 months)
• Sub projects (with very approximate resource estimate):
– Overall concept (feasibility, risk analysis, etc.) (50-70%FTE engineer)
– Simulation, comparison with Block 4 data. (20%FTE engineer)
– Power supply considerations: voltage budget, diode turn-on voltage,
additional cable layout (20%FTE engineer + 30-40%FTE technician)
– Measurement and interlocking: dynamic range of voltage measuring devices
(nQPS), interlocking algorithm (20-30%FTE engineer)
– Manufacturing of custom-made devices (e.g. card extenders) (if needed)
additional programming (if needed). (1FTE technician+20%FTE engineer)
• Eventually an external review
• Resources estimation for initial phase: minimum total of 1.5FTE engineer,
1.5FTE technician
• Production phase will take more resources (but for a shorter period).
Possible outcomes
• The Thermal Amplifier is not a tool that would
necessarily allow us to operate at higher energies.
• It would allow us to operate at the limit of what is
possible with the current status of the machine. But at
that energy we would operate with near-zero risk.
• If the (as yet unmeasured) machine is in good shape,
and the measured machine has not deteriorated, then I
believe we can operate at 5TeV.
• If not, it might tell us that even 3.5TeV is risky...
• Added bonus: we can use it as a qualification tool after
the long shutdown...
...And now to the answers of the
questions...
• Status and plans for RRR measurements during 2010 X-mas stop
– RRR measurements ongoing, first results, finish in January
• What can we learn in the best case (ie can we go to 5TeV after just RRR
measurements)?
– No. we can gain 0.2 to 0.3 TeV per beam in the best of cases (Arjan)
• Do we need (additional) analysis software for RRR and thermal amplifier?
– RRR: too late now. Thermal amplifier: some effort is needed
• Is it essential to do the thermal amplifier measurements before the longshutdown?
– Thermal amplifier measurements only make sense before the long shutdown
• What is the best moment to do these measurements and how to do them safely?
– Next Xmas shutdown. To do them safely we need to work on an interlock (or a procedure)
• Compatibility with and impact on nQPS system?
– Most probably some custom modifications needed – to be defined by a working group
• Resources especially manpower for test and evaluation?
– 1.5FTE engineers + 1.5FTE technicians, possibly much more during production (QPS, CRG, EPC
groups involved)
End
Extra slides
The extrapolation
•
•
We need to know the number of bad splices above a certain limit in the whole machine.
The R16 measurements are used to determine the outlying distribution (from 5 sectors, RB
only) - described in CERN-ATS-2010-200 and CERN-ATS-2010-175).
This method uses a small, biased sample from only the RB
circuit and from only 5 sectors to derive the distributions of bad
joints in the whole machine, extrapolating to a large extent
The method gives
R_excess < 98uOhms
(±10uOhms) at the
90%CL
No. of measurements: 134
Extrapolating an (unknown)
distribution is always risky!
Analysis by Jim Strait
RRR measurements
U_RES, U_RES_UNCOMP, U_MAG, U_BB
0.000050
0.4
0.35
0.000000
0.3
-0.000050
0.25
0.2
-0.000100
0.15
U_BB corrected
U_RES uncomp.
DCBB.B12L6.R:U_RES_SPLICE
-0.000150
0.1
0.05
-0.000200
0
-0.000250
-0.05
-0.000300
-0.1
300
350
400
450
500
DCBB.B12L6.R:U_MAG_SPLICE
The principle
of the
measurement
can best be
demonstrated
by a real
example from
sector 56 (data
taken
10/12/2010
More on the TA principle
• We can use the following variations on the method:
1.
A series of current plateaus of increasing amplitude and duration, with
adequate time for analysis in between
1.
One plateau with an on-line interlock that would stop the thermal runaway
interlock
2.
A series of pulses (of a few seconds duration) interspersed by periods (of a
few seconds) where measurements are performed, coupled to an on-line
inhibitor for the next pulse
heating
measurement
interlock
Proof of principle in Block 4
Copper bar of ~5m long
A 4cm defect was introduced in a 5m long copper bar
of cross section 20X10mm. The bar was put in a
cryostat and the bath temperature could be adjusted
between 4K and 40K. A DAQ system could log the
voltages while a power converter could supply a
current between 800 and 6000A
Defect machined out of the bar – its
resistance at warm is 50uOhms
Many thanks to Marta and the Block 4 team:
(Christian Giloux and Jerome Feuvrier)
Voltage budget
• The power converter at our disposal is the RB power converter:
190V/13kA (both for RB and the RQ circuits!)
• We would need a certain voltage to ignite the diodes. I could find no
measurements for the ignition voltage of the diodes at 20K. A test in Block
4 has been approved and will take place shortly. We believe that the
voltage needed would be about 1.5V per diode (300V for the sector for
the RB)
• After ignition, the diode voltage will slowly drop to about 1 volt
• The resistive voltage in the case of the RB would be about 11V @ 20K, 7V
@ 30K, 11V @ 40K – slightly higher for the RQ
• The inductive voltage would be around 20V – for a 3000A/sec dI/dt
• An extra power supply will be needed – 500V/100A?
• EPC should advise
Voltage budget
RB
RQ
Diode - ignition
~300V
~100V
Diode – steady state
~150V
~50V
Resistive
~7-11V
~10-15V
inductive
~20V
~20V
Safety - interlocking
• Implementing an interlock using the QPS system is a
challenge, but would ultimately be the safest solution.
There are two challenges here:
– Integration time for a measurement might need to be
reduced (currently 10seconds)
– Saturation of the nQPS system at high currents
• If an interlock is not possible, a very robust procedure
should be adopted, where the green light for the next
step is only given after careful analysis of the results of
the previous test. (we have adopted this approach in
the past, for instance when performing the first Maya
pyramids)