Transcript Market Segment - Danna Shu Portfolio

IP Strategy Discussion
1.0
November, 2000
eSilicon Confidential
Major Topics Associated with IPs
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Priorities
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Customer-driven?
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Market Dynamics
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Platforms? Bus Architecture?
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eSilicon Own IP Dev.?
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How many IP vendors can we
support?
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General Purpose (CPU, Analog)
vs. Appl. Specific (PHY, Serdes)
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eSilicon IP/Supplier Roadmap
Business
Suppliers’, Customers’, eSilicon’s POV
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Licensing Model
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Licensing T&C’s
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Licensing Fees & Royalties
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Re-distribution Right to
Customers & Design Federation
Partners
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Competitive Analysis Issue with
eS Plan
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Technical & Support (Rakesh)
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Hard vs. Soft
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IP Validation & Audit
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Test Chip?
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IP Test Strategy
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Standard Compliance – VSIA?
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Deliverable from Suppliers
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Repository & Revision Control
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Support & Training Model
Infrastructure & Resources
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Spec. Review w/ Customers
IP Partner Selection Process/Criteria
Contractual & Legal
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Who is responsible if the design
(IP) does not work?
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What do we guarantee to
customers?
eSilicon Strategies
Market Strategy
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Phase II: eS Design is our ASIC engagement strategy. Focus on
mid-complexity & performance segments of: Peripheral, Consumer,
Wireline & Wireless
Peripheral: Storage Area Network (SAN), Network Attached
Storage (NAS), Consumer Storage
Consumer: Digital TV, DVD, Set Top Box
Wireline: xDSL, Voice over IP/DSL
Wireless: Internet Data Access (Handset), PDA
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Phase IV: Add Platforms to eS Design to move us into an
SoC/ASSP strategy. Focus on communications system
knowledge…this is where high margin (and valuation) will be.
What will make our offering stronger - Accessibility of silicon-proven
applications specific IP cores, including high-speed or custom I/Os.
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Priorities
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Customer-driven?
It’s the 80-20 rule. If we rely too
much on specific customers’
priorities, it’s going to be chaotic &
we may not be able to respond to
the req’s fast enough.
Market Dynamics
IP & Reuse are shifting toward
applications specific. We need to
assess the IP req’s for the targeted
applications – SAN, NAS, Consumer
Storage, DVT, DVD, STB, xDSL,
VoIP/DSL, 3G Handset, PDA.
Platforms? Bus Architecture?
The TAB did not rank platform as a
high priority. OEMs are defining
their ASIC architecture for product
differentiation. Platform is an ASSP
strategy.
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eSilicon Own IP Dev.? Yes.
Focus on custom I/Os, analog
functions, & applications specific IPs
that are commercially not available,
such as 2.5G Serdes.
If we do develop our own IPs, how
do we fund the activities? The most
logical choice is through the
production margin.
We should develop a ROI model
whenever internal IP development is
requested.
How many vendors can we support?
IP access is one of the top req’s to
compete in the market place. We
have to support whatever necessary
from design POV.
We do need a decision making
process for vendor selection.
Priorities (cont…)
Standard Cell Libraries,
High
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Standard I/Os,
High
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PLL, OSC,
High
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SRAM/ROM/FIFO,
High
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CPU,
High
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DSP (Handset)
Medium High
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DAC/ADC (Consumer),
Medium High
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Serdes (Network),
Medium High
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Interfaces – PCI/USB/1394, Medium High
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High Speed I/O
Medium
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DRAM/CAM/NVM,
Medium
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DRAC,
Medium
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Programmable Core,
Low Medium
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Firmware.
Low Medium
* Need to assess the IP availability commercially.
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Deliverable from Suppliers
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Datasheet.
Specifications.
IP Usage White Papers. (Applications Specific)
C Model or HDL Simulation Model.
Testbench.
RTL Codes, Synthesis Scripts, & Timing Constraints. (soft)
Timing Model / .lib (hard)
Gate Level V’LOG Model w/ Delay Calculator & SDF Support. (hard)
DFT Strategy.
LEF & GDSII (hard)
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