T3MAPS Adapter Board Update

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Transcript T3MAPS Adapter Board Update

Adapter Board Design
Changes
JEREMY SANDOVAL
7/14/14
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Outline
1. Analyzing FEI4 Adapter Card 1.1a
2. T3MAPS Adapter Card vs. FEI4 Adapter Card 1.1a
3. Goals for T3MAPS Adapter Board v3
4. High-Speed Digital Design Techniques
5. High-Speed Digital Design Techniques cont.
6. High-Speed Digital Design Techniques cont.
7. Plan for the Week
8. References
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Analyzing FEI4 Adapter Card 1.1a
Studied the layout of FEI4 Adapter Card Rev1.1a to learn more about successful high-speed
design:
T3MAPS Adapter Boards v2
FEI4 Adapter Card 1.1a
Uses SN74AVC8TPWR Level Shifter
Uses SN74AVC4TPWR Level Shifters
2 Layers
4 Layers
Operates up to 30Mhz
Operates up to 40Mhz
Board to Board Connector
Board to Board Connector
High speed traces routed antiparallel
High speed traces routed in parallel
Level shifter I/Os placed close to
connectors
Level shifter I/Os placed close to
connectors
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Side-by-Side Layout Comparison
T3MAPS Adapter (left)
• Red = top layer
• Blue = bottom layer
FEI4 Adapter (right)
• Green = top layer
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Goals for T3MAPS Adapter Board v3
Goals for T3MAPS adapter board v3:
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Improve design to achieve higher operating speeds (>30MHz up to possibly 90MHz)
Change output pins (going to T3MAPS) to a polarized ribbon cable connector
Avoid noise on the ground plane
Shorten high speed traces between connectors as much as possible
Remove parallel terminating resistors, keep series resistors
4 layer stack up
Add additional bypass capacitors
Keep terminating series resistor close to level shifter I/Os
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High Speed Design Techniques
Pay attention to high frequency current paths on the board and avoid breaks in ground plane:
[1] TI’s High Speed PCB Layout Techniques
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High Speed Design Techniques cont.
Bypass Capacitors are affected by frequency
◦ The material is a major factor in the characteristics of the capacitor over temperature and frequency
◦ The most pronounced elements are the true capacitance, the equivalent series resistance (ESR), and the
equivalent series inductance (ESL)
◦ ESL causes the capacitor to stop behaving like a true capacitor at high frequencies as the impedance
starts to increase rather than keep decreasing
◦ Ceramic capacitors are most widely used bypass capacitor
◦ Several grades to choose from with COG being the best and Y5V the worst
◦ For example, Y5V capacitance can vary as much as +22% over temperature
and frequency whereas COG can vary less than 0.1% at 10Mhz
[1] TI’s High Speed PCB Layout Techniques
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High Speed Design Techniques cont.
[1] TI’s High Speed PCB Layout Techniques
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Plan for this week
Finish board layouts for T3MAPS adapter and circulate (By Tuesday)
Run circuit simulations in Altium Designer
Take lab inventory and compile bill of materials
Lab hours:
Wed: 1-3
Fri: 1-3
I can be in the lab More if needed, just send me an email: [email protected]
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References
[1] TI’s High Speed PCB Layout Techniques, http://www.ti.com/lit/ml/slyp173/slyp173.pdf
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