Transcript transparencies - Indico

AD/DA Conversion Techniques
An Overview
J. G. Pett

Introductory tutorial lecture for :‘Analogue and digital techniques in
closed-loop regulation applications’
17/09/2002
 for terminology see Analog Devices Inc.
AD/DA
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Introduction to the subject
Understanding conversion methods
 Methods
 Parameters
The past, the present and the future
Introduction
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What are AD/DA Converters
What are they used for
Why do you need to know how they work
Digital coding methods
Waveform digitising
CERN examples
What are AD/DA
Converters (1)
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An Analog to Digital converter [AD or ADC]
is an electronic circuit which accepts an
analog input signal (usually a voltage) and
produces a corresponding digital number at
the output
An Digital to Analog converter [DA or DAC]
is an electronic circuit which accepts a
digital number at its input and produces a
corresponding analog signal (usually a
voltage) at the output
They exist as modules, ICs, or fully
integrated inside other parts, e.g. µCs
Photos
What are AD/DA Converters (2)
Analog
Digital
discrete time world
continuous time world
+/-10v
ADC 1
DAC 1
16
12
COMPUTER
or µP/µC
+/-5v
ADC 2
16
Typical AD & DA Application
+/-10v
The Real World
The Real World
continuous time world
Analog
What are they used for
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Any time a real world analog signal is
connected to a digital system
CD players, GSMs, DVMs, Digital Camcorders
etc, etc
CERN control systems & instruments
HOWEVER, each application has particular
needs
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Resolution - number of bits
Speed and Accuracy
Level of input/output waveforms
Cost etc
Why do you need to know
how they work
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Because the theoretical course you will
shortly undertake assumes perfect
converter products - BUT
Practical converters have :
Many conversion methods - why
 Trade-offs between resolution and speeds +
delays
 Different methods of “sampling” the
waveforms
 A large number of basic and method-dependent
error sources
 Manufacturers specifications which ‘differ’ AND
Almost all converters need some analog ‘signal
conditioning’ which is application dependent
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Digital coding methods (1)
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8,10,12,14,16,18, 20-24bits?
+10v
Most/Least significant bit
MSB/LSB
Uni-polar, bipolar, straight
binary, 2’s complement invert MSB
Parallel I/O or serial [delay]
0v
Bytes or words
Double buffering
Digital ‘breakthrough’
Digital correction methods
Time skewing & jitter
-10v
AD/DA Transfer Characteristic
0000
8000
8000
FFFF
0000
7FFF
FFFF
Digital coding methods (2)
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Resolution = 2n-1
n
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8bits
10bits
12bits
14bits
16bits
18bits
20bits
22bits
24bits
[n = number of bits]
2n
256
1024
4096
16384
65536
262144
1,048576
4,194304
16,777216
1bit ppm [1x10-6]
3906
976
244
61
15
3.8
0.95
0.24
0.06
Digital value
Waveform digitising (1)
time
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A waveform is ‘digitised’ (sampled) at a constant
rate D t
Each such sample represents the instantaneous
amplitude at the instant of sampling
Between samples the value remains constant [zero
order hold]
What errors can occur in this process ?
Waveform digitising (2)
C
A
D
B
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A & B show aliasing in the time domain
C & D show a different case in the frequency
domain
- it is important to understand these effects
Waveform digitising errors
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For a DAC
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output waveform is a ‘distorted’ version of original
higher frequencies not reproduced - aliasing ?
‘average shape’ displaced in time
‘sharp’ edges need filtering
For an ADC
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converter sampling errors
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with a ‘sample & hold’ circuit ahead of the converter?
integrating action during part, or all of the sample-time
?
conversion time
data ‘available’ delay
aliasing - [ is multiplication of input spectrum and
fs]
…[must ‘remove’ all spectrum > fs/2 before
sampling]
Sampling rate
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Nyquist rate = 2x highest frequency of
interest
Practically, - always sample at least 5x, or
higher
Ensure ADCs have input filtering [anti-alias]
where necessary [large hf signals]
Filter DAC outputs to remove higher
frequencies and switching ‘glitches’
‘Over-sampling’ converters sample x4 to
x500 - this may reduce above problems
and/or extend resolution
CERN examples
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Many PLCs with analog values, such as
temperature, to measure : 10 - 12bit <10kHz
PS, SPS, LHC control instrumentation, such
as power converter control, regulation and
monitoring : 16 - 22bit <1kHz
Beam instrumentation, experiments : high
speed: 10 - 12bit 25ns
ETC ETC
Photos
1969
ISR Beam-Transfer DAC
[5 decimal decades]
1973
ISR Main Bends DAC
[16bit binary
Relay switching
Kelvin-Varley divider
All electronic switching
Photos
ADC Sigma-Delta 1998
1989
LEP 16bit Hybrid DAC
Understanding Conversion
Methods
AD/DA Methods
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Some very simple ideas
DAC circuits
Basic ADC circuits
 Successive approximation, flash - S&H
 Integrating - single/dual/multi slope
 Charge balance, D
Some very simple ideas
‘Digitally set’
potentiometer
Comparator
DAC
ADC
Vref
dial
Vdac
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equal
=
Unknown
voltage
ADC =
 precise reference voltage
 comparison of divider value with unknown [analog input]
 “digitally adjustable” divider or potentiometer [output
value]
DAC =
 precise reference voltage ……. {multiplying dac}
 “digitally adjustable” divider or potentiometer [input
value]
 optional output amplifier of pot. value [analog output]
DAC circuits (1)
Simplified binary weighted resistor DAC
R - 2R ladder DAC
8.75V
9.375
max.
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Summation of binary weighted currents
Modern DACs use the ‘R-2R ladder’
DAC circuits (2)
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Important circuit concepts
 Resistor tracking - temp. & time > ratios
 Switch is part of R [on & off resistance]
 Limits for tracking and adjustment
 Switch transition times - glitches
 Switched current sources are faster
Other DAC methods
 DC performance not needed for all uses
 Different ladders, Caps. as well as Resistors
 PWM, F>V
 Sigma-Delta
Performance cannot be better than the Reference
- {multiplying DAC concept}
Basic ADC circuits (1)
Simple ramp and comparator ADC
Unknown
analog
input
start
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Binary output
Digitising begins with a ‘start’ pulse
DAC is ramped up from zero
counter stopped by comparator when Vin = DAC out
ADC output is counter value
Tracking ADC
Basic ADC circuits (2)
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This ADC circuit is limited and rarely used
WHY 
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slow
variable time to give result
input signal can vary during digitising
Successive Approximation ADC solves these
problems - using
 complex logic to test and retain each DAC bit
 a sample and hold circuit ahead of the
comparator
Successive Approximation
ADC
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Fast process - 1 100µsecs
Result always n clocks
after start
Used extensively for
12-16bit DAQ systems
Vref
Flash ADC
Half-Flash
Vref
analog
input
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The fastest process <50nsecs
Limited resolution typically 8 10bits
Half-flash technique is cheaper
analog
input
Flash
Sample & Hold Circuit (1)
LF398
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Essential for defining the ‘exact’ moment of
sampling
Circuit introduces other error sources [ see (2) ]
Sample & Hold Circuit (2)
Storage Capacitor Waveform