Transcript Document

I2C investigations
- some reported problems from some APV users
- sensitivity to “termination” resistance
and power supply levels
- I2C scheme very simple, ought to be problem free
- so what’s going on?
Outline
probable cause of problems
measurements on I2C transactions on CCUM/hybrid
measurements of APV I2C drive strength
possible solutions
content here summarises e-mail exchanges between:
S.Marchioro, R.Hammarstron, V.Commichau, J.Mnich, J-D.Berst,
U.Goerlach, G.Hall, M.French, C.Ljuslin, C.Paillard, W.Karpinski.
I2C website
http://www.semiconductors.philips.com/i2c/
Mark Raymond
[email protected]
July, 2001
CMS Tracker Electronics
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I2C electrical scheme
DRIVER
(master,
e.g. CCU)
in
LEVEL
SHIFTER
5V
out
2.5V
I2C line
(SDA)
Pull-up
R resistor
C
(parasitic)
APV
(slave)
hysteresis
in
out
DRIVER
0.25 mm CCU directly in CMS. VI2C in lab. CCU module for hybrid presently.
LEVEL SHIFTER
Not needed in CMS. Incorporated in CCUM. Various solutions possible.
I2C line
RC should be small cf I2C clock period (10ms). C will be layout dependent.
APV (MUXPLL)
hysteresis characteristic gives noise immunity
input has to be pulled below lower threshold for APV to correctly recognise data
What’s going wrong?
Suspect problem arises due to output drive capability of level shifter stages
combined with small values of pull-up resistor R.
July, 2001
CMS Tracker Electronics
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Level shifter circuits
Opto-isolated level shifter (simplified schematic)
used in APV test setup in IC lab
5V side
Rpullup
isolation
barrier
2.5V side
*
DRIVER
SDA
Rpullup
*
APV
SDA
*
Diodes used to implement bi-directionality
use low forward drop devices (Schottky) but still ~ 0.25V or more if Rpullup small
If SDA not pulled low enough to trip APV I/P hysteresis threshold then APV
will fail to recognise its own address and I2C transaction will fail
CCU module/hybrid system
5V
SDA
CCU side
2.5V
SDA
APV side
Level shifting is implemented using MOSFET on CCU module
Copes better with low values of Rpullup, but ON resistance still exists
July, 2001
CMS Tracker Electronics
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I2C measurements on the IC APV test setup
2.50
Volts
2.00
1.50
SCK, pull-up = 10k
1.00
0.50
0.00
2.50
Volts
2.00
1.50
0.25V
0.50
1.00
SDA, pull-up = 10k
0 indicates
write cycle
APV address 0100001
0.00
2.50
Volts
2.00
1.50
0.35V
0.50
SDA, pull-up = 1.5k
APV
acknowledges
own address
1.00
0.00
2.50
Volts
2.00
1.50
>0.35V
0.50
SDA, pull-up = 1.3k
1.00
APV fails to
decode own
address and so
doesn’t generate
acknowledge
0.00
10 usec/division
I2C transaction fails on this setup if SDA line not pulled lower than ~ 0.35 Volts
July, 2001
CMS Tracker Electronics
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Measurements on the CCU module/hybrid setup
2.50
Volts
2.00
1.50
SCK, pull-up = 1.5k
‘0’ indicates
write cycle
1.00
0.50
0.00
2.50
Volts
2.00
0.25V
1.50
1.00
SDA, pull-up = 1.5k
APV address 0100001
APV
acknowledges
own address
0.50
0.00
2.50
Volts
2.00
0.35V
1.50
SDA, pull-up = 500W
1.00
0.50
0.00
2.50
Volts
2.00
>0.35V
1.50
SDA, pull-up = 375W
1.00
0.50
APV fails to
decode own
address and so
doesn’t generate
acknowledge
0.00
10 usec/division
I2C transaction fails at pull-down voltage > ~ 0.35V
corresponding to pull-up resistance of
375W = 1.5k // 500W
(1.5k is built in resistance on CCU module)
July, 2001
CMS Tracker Electronics
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APV25 I2C drive strength
How low can APV pull SDA line for a given pull-up resistor value?
Use strong driver circuit (so that APV can always respond to I2C transaction)
and use different values of Rpullup, measuring how low APV can pull SDA
during Acknowledge cycle.
address
2.50
Volts
2.00
1.50
1.00
0.50
bit
APV
ACK
write bit
bit
Vdiff
0.00
10 usec/division
700
600
Vdiff [mV]
500
400
300
200
100
0
100
2
3
4
5 6 7 89
2
3
4
5
1000
SDA pull-up resistor value [W]
e.g. for Rpullup = 500W APV can pull SDA line down to within 200mV of VSS (0V)
July, 2001
CMS Tracker Electronics
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Pull-up resistor/s (where and what value?)
CCUM
?
?
OH
FEH
?
Seems as though ought to be trivial, but of course isn’t quite
In final system 0.25um CCU master talks directly to 0.25um APV/MUXPLL/LD slaves
no level shifting required => problems go away
Interim situation
present CCUM, test systems incorporate level shifting stages
will want to test hybrids (FEH,OH) in isolation, and together, on different test beds
e.g.
assume worst case cable capacitance ~100pF (reasonable?)
for RC < 1ms (CR < 5t, t=5msec) => R ~ 10k
Could split 10k between FEH and OH (20k on each)
May need different variants depending
on location in detector
SCK
SDA
July, 2001
5 ms
CMS Tracker Electronics
C~cable capacitance
R=pull-up resistor
7
Pull-up resistor (where and what value?)
Alternatively
CCUM
FEH
OH
Put pull-up here only
(~few kW)
Leave these resistors out altogether
(or make large)
Shouldn’t confuse pull-up with termination
Present choice of resistor on CCUM (1.5k) will probably work in all cases
Components on FEH and OH can be finalised now
Suggestion only – others will want to comment
July, 2001
CMS Tracker Electronics
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Conclusions
I2C problems experienced probably due to level shifter circuits
coupled with low values of pull-up resistor
Should be no problems in all 0.25mm final system
Suggested solution
put large pull-up resistor values on FEH and OH (~20k say)
(will, in any case, be dominated by 1.5k on present CCUM)
if necessary (large bus capacitance) put smaller value on CCUM
July, 2001
CMS Tracker Electronics
9
Other matters
APV25s1 biasing
- manual needs update, I2C values correct for APV25s0, not s1
Recommended bias settings. Because of current mirroring change
between s0 and s1 versions the numbers in the manual must change
(approx 70% of s0 values).
External bias at 128 mA, power supplies = 0, 1.25V, 2.5V
IPRE
IPCASC
IPSF
ISHA
ISSF
IPSP
IMUXIN
VFP
VFS
85
45
30
~30 (tune for optimum pulse rise time)
30
48
30
~30 (preamp fall time - can be higher but depends on occupancy)
~60 (tune for optimum pulse fall time)
Pulse shape tuning (rough guide):
As detector capacitance increases ISHA needs to increase
VFS needs to be reduced
For capacitances in the range 0 -> 20 pF:
ISHA in range 20 -> 65,
VFS in range 65 -> 50
July, 2001
CMS Tracker Electronics
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APV25s1 biasing
Internal biasing
dependence on value of on-chip resistor
testing so far => 15 % increase of all I2C current settings
(w.r.t. external (128mA) values)
i.e.
external (128mA)
IPRE
IPCASC
IPSF
ISHA
ISSF
IPSP
IMUXIN
85
45
30
~30
30
48
30
internal
98
52
34
~34
34
55
34
=> values in “internal” column should be used for the hybrid (for now)
Need to find a strategy for choosing I2C bias current settings
Internal Iref will depend on local power supply values,
and on internal resistor value (+/-10%)
Can probably be managed by correction factor applied to all
values (as above) to achieve “correct” power consumption
Something to look at in system test?
July, 2001
CMS Tracker Electronics
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APV25s1 biasing
ICAL I2C register setting
determines magnitude of calibration step applied to capacitors
feeding preamp inputs
actual value of charge injected will depend on:
reference current value (external/internal(on-chip resistor value))
I/V resistor value in bias generator
very small charge injection capacitors
can be used to calibrate (tune) pulse shape, but not for accurate
gain measurement
rough value to get 1 mip signal
APV25s0
external, 128mA
APV25s1
external, 128mA
APV25s1
internal
~ 40
~ 25
~ 29
July, 2001
CMS Tracker Electronics
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APV performance dependence on LV power supplies
Currently under study, no show-stopping discoveries, but some aspects of performance
affected (mainly dynamic range identified so far)
Pictures show peak mode pulse
shapes for signals from
-2 to +6 mips in 0.5 mip steps
400
gain change minimal but
loss of headroom in –10% case
100
200
0
assumptions so far:
-100
400
+8% (0, 1.35V, 2.7V)
2.7 V not exceeded
I2C current settings tuned to
get same analogue current for
different PSU voltages
300
ADC units
power differences symmetrical
on both rails
nominal
(0, 1.25V, 2.5V)
300
200
100
0
-100
400
-10% (0, 1.125V, 2.25V)
300
200
100
0
-100
0
July, 2001
50
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100
150
time [nsec]
200
13
APV performance dependence on LV power supplies
500
- 10% (0, 1.125V, 2.25V)
nominal (0,1.25V, 2.5V)
+8% (0, 1.35V, 2.7V)
ADC units
400
300
200
100
0
-2
July, 2001
-1
0
1
2
3
signal [Mips]
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5
6
14