Transcript Component - UCSD Jacobs School of Engineering

Architecting Embedded Microsystems
Building smart, adaptive and efficient
systems for networked applications
Rajesh K. Gupta
Department of Computer Science and Engg.
University of California, San Diego
http://www-cse.ucsd.edu/~gupta
Semiconductor “System Chips”
• Trend 1: Process technology migration to CMOS
– relentless digitization of signals and systems
• Trend 2: increasing use of “embedded intelligence”
– variety of (multiple) compute engines available on-chip
• Trend 3: Networking of embedded intelligence
– multiple comm. front-ends, networking available on-chip
Courtesy: Paul Gray, UC Berkeley (ISSCC97)
1. GaAs, Si Bipolar
2. Si Bipolar, BiCMOS
 The consequence:
3. CMOS
– smart “spaces”,
intelligent interfaces,
sensorController
networks
Graphics
Cellphone Baseband
 Integrated circuit chips are driving capability increases with cost
reductions.
Integrated Circuit & System Design
PE
SYSTEM
L2
MEM
Math
Router
Graphics
Controller
MEM
Technology
Independent
Design
Technology
Dependent
Design
IC/CHIP
PE
IO
“Real” Component
L2
IO
Controller
Router
Math
“Virtual” Component
Graphics
SYSTEM-ON-A-CHIP
 Silicon systems engineering: needs a framework
for architectural design, subsystem tradeoffs
Board-on-chip
does not work!
SOC Challenges & Opportunities
• Inferior CMOS components compared to discrete
counterparts using bipolar, GaAs technologies
• Power, size, bandwidth limitations for on-chip
 Need an extremely tight control of chip, package
parasitic effects on on-chip signals
• And yet the system-level capabilities and
performance due to
• architectural design that is less sensitive to
device/technology limitations
• system optimizations that include the entire software,
networking (and even communications) stack
 The requires ability to carry out the architectural
design and exploration for SOCs
Systems Engineering for SOCs
Source
Example Problem: How to achieve high throughput in a SOC
for wireless applications?
antenna
Source
Coder
Multiple
Channel
• Can select aMultiplex
modem sub-system
Access
Coder
Power
Amplifier
Modulator
–Source
that packs more bits/Hz, but it will tolerate less noise and be less robust so
Coder
that link throughput may not improve
Carrier f
transmitted
c
• Can increase transmit power in RF subsystem
symbol stream
“Limited
b/w”energy cost, reduces network
– to improve robustness but this
increases
Radio
“Highly variable b/w”
capacity, and requires more expensive
“Random &analog
Noisy”circuits (power amps)
Destination
• Can reduce bits/frame
“Spurious disconnections”
Channel
received (corrupted)
– to tolerate higher bit error rates (BER) and provide more
robustness,
but
symbol
stream
this may increase overhead and queuing delays
Source
Decoder
• Can increase
precision
in digital
modem
Multiple
Channel
Demodulator
Demultiplex
Access
Decoder
& Equalizer
RF
Filter
antenna
– Source
to reduce noise, but this leads to wider on-chip busses and more power
Decoder
consumption
Carrier
f
 The design technology must support right
sub-system
option
and parametric determination.
c
Platform Based Design
• A platform is a realized design pattern
– provides a well-defined abstraction of the underlying architecture for
the application developer
– a restriction on the implementation space, captures good solutions
– uses components and their reuse within architectural constraints
• IP design needs a framework consisting of
– component libraries, composition glue, validation, synthesis
– complete system simulations, composability and reuse
• Key elements for composability
– identification of useful models of computation
» FSMD, DE, DF, CSP, ..
– a flexible, extensible language platform for capture
 Component Composition Framework (CCF)
BALBOA Component Composition
• A layered development and runtime
environment
– Functionality: describe & synthesize
– Structure: capture & simulate
• Use an interpreted language for
– Architecture description
– Component integration
• Use compiled models for
– behavioral description, simulation
• Automatically link the two domains
– through a “split-level” interface
• Automatic code “wrapper” generation
– for component reuse.
Software architecture that enables
– composition of structural and functional info.
– type inference for polymorphic ports
– modeling of the application and the platform
System designer
Component
Integration, CIL
Split-Level
Interface/BIDL
C++, SystemC
Definitions
•
Component:
– A unit of re-use with an interface and an
implementation
•
Meta-information:
– Information about the structure and characteristics
of an object
•
Reification:
– A data structure to capture the meta-information
about the structure and the properties of the
program
•
Reflection:
– An architectural technique to allow a component to
provide the meta- information to himself
•
Introspection:
– The capability to query and modify the reified
structures by a component itself or by the
environment
5 ports
adder
BALBOA Language & Run-time
Language
CIL
BIDL
C++
Tools
Run-time structure
Introspection
SLI/Type
BIDL
system
Compiler
extension
GCC
Reflection
GCC
Interpreter
Split Level
Interfaces
Compiled
objects
Introspective Interfaces for Analysis
Design Example:
Adaptive Cache Controller
CIL Script Example
#load the AMRM component library
load ./libamrm.so
L1
Entity mem_sys
Cache
mem_sys.L1
Memory mem_sys.Mem
Queue
mem_se.r_q
r_q
Mem
mem_sys
L1.upper_request link_to ms.r_q
Mem.request_in link_to ms.r_q
Tb add_stimuli 100 read 0x399
Tb add_tcl_callback ms.r_q.activity {
simulator.do_something; }
simulator run 200
Design Example: Cache Controller
Number of C++
classes
Number of CIL
lines
Number of BIDL
line
IP vs Generated
C++ code size
ratio
7 C++
< 30
60
812/809
(1.01)
8 C++
with SystemC
< 40
84
1512/1002
(1.51)
7 C++
with SystemC
< 150
87
1437/880
(1.63)
Script size vs C++ ratio: 1 is to 10
Manipulate
only the
script!
Composition Framework
• Dynamically adapt, control and debug complete
system models
– Using “script-like” interfaces and mixed compiled and
interpreted programming components
– Component introspection through the reflection enables
IP reuse
• Create “Virtual” System Architectures
– Include application and system software in the model
• Exploit full potential of SOC architectural
platforms
– by exploring runtime system services suitable for SOC
applications
– example: dynamic power management
Virtual System Architectures
Extended
SystemC
HW wrapper
libraries
OS libraries
Virtual Architecture
Processor
libraries
APIs
Communication
and System
Services
Custom OS
Generation
HW Wrapper
Generation
Protocol
libraries
RTL Architecture
Device
Drivers
Co-simulation
libraries
RTL Synthesis
and Compilation
Co-simulation
Wrapper Generation
Emulation platform
Executable
Co-simulation
Model
Cesario, et al, IEEE D&T 11/02
Simulator
libraries
Channel
libraries
OS-directed Power Management for SOCs
• Significant opportunities in power
management lie with application-specific
“knobs”
– quality of service, timing criticality of
various functions
• Collaboration between applications and
the OS in setting “energy use policy”
– OS helps resolve conflicts and promote
cooperation
• The enable OS-directed dynamic power
management, we need:
 OS should incorporate application
information in DPM policy
 OS should expose power state and
events to applications for these to
adapt.
Application
PA-API
PA-Middleware
POSIX
PA-OSL
Operating
System
Modified
OS Services
Operating
System
PA-HAL
Hardware Abstraction Layer
Hardware
Power Aware Software Architecture
• PA-API (Power Aware API)
– interfaces applications and OS
making the power aware OS
services available to the
application writer.
• PA-OSL (Power Aware Operating
System Layer)
– implements modified OS services
and active components such as a
DPM manager.
• PA-HAL (Power Aware Hardware
Abstraction Layer)
– interfaces OS and Hardware
making the power control knobs
available to the OS programmer.
Current Status
• API available from http://www.ics.uci.edu/~cpereira/pads
• Implementation on eCOS RTOS and
– Hardware platforms we are currently working with:
» Linux-synthetic (emulation of eCos over Linux - debugging
purposes only)
» Compaq iPaq Pocket PC - StrongARM SA1110 based platform
» Accelent IDP (Integrated Development Environment) - also
StrongARM SA1110 based.
» LRH Intel evaluation board 80200EVB - Intel Xscale2 based
1.2
1
0.8
Taskset A
0.6
Taskset B
0.4
Taskset C
0.2
T2
MPEG2 (wg_cs_1.mpg)
26300
2100
T3
ADPCM
9300
3300
T4
FFT
15900
0
T5
FFT (gaussian distribution)
13600
800
Scheme
Shut./Static/Dyn./Adap
t. (0.75)
MPEG2 (wg_gdo_1.mpg)
Shut./Static/Dyn./Adap
t. (0.80)
T1
Shut./Static/Dyn./Adap
t. (0.85)
Std Dev
(us)
3100
Shut./Static/Dyn./Adap
t. (0.90)
Shut./Static
WCET
(us)
30700
Shut./Static/Dyn./Adap
t. (0.95)
Application
Only Shutdown
0
Shut./Static/Dyn.
Task
Energy Consumption for each scheme
Normal
Ratio of energy consumption
between Normal and Scheme
OS-directed DVS Results
Using Application-level “knob”
• Example: Image Compression Algorithm
– tradeoff image quality against energy available
by varying the compression parameters such as
BPP (bits per pixel)
– The image compression algorithm is ran in a
continuous loop with battery polling every 10
secs.
– A simple power tradeoff policy is added to adapt
the quality of the image against the battery
voltage left.
– Whenever the battery drops 30mV the
application adjusts the image BPP by -0.5
starting at 1.5.
For a cut-off of 4020mV, the battery life is
extended from 290 seconds to 340 seconds.
Summary: Computers with Radios are
Leading to New “Spaces”
• Generational shift in computing devices
– lot more of everything: computing, networking,
communications
– lot less of power, energy, volume, weight, patience
Instrumented
–wide-area
Application
is everything,
spaces
Internet end-pointsthe possibilities are limitless
• System architectures are due for an overhaul
– the architectures are (radically) changed/challenged
– the programming context is changed
– the system software contractpower
is changed
In-body, in-cell, in-vitro spaces
Personal area spaces
» new
awareness: location, power, timing, reactivity, stability
SOC Architectural Design Paradigms
The IP Basket
“Organically grown”
The Planned Community
The sacrificial altar
Engineered
Specialized
Ambitious (and never finished)