Transcript CCC Module PH19510

Chaos, Communication
and Consciousness
Module PH19510
Lecture 8
Entering the Transistor Age
Overview
Metals, Insulators & Semiconductors
 The junction diode
 The bipolar transistor
 Planar Processing
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Metals, Insulators and
Semiconductors
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Metals
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Insulators
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Overlap of valence & conduction bands
empty states for electrons to move into
 conduction
Large gap between valence & conduction bands
No free states
No conduction
Semiconductors (Silicon, Germanium, GaAs etc)
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Small gap between valence & conduction bands
 Some free states
 some conduction – depends on impurities, temperature etc.
Column IIIB, IVB & VB
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Column IIIB
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Column IVB
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B, Al …
3 electrons in outer shell
C, Si, Ge …
4 electrons in outer shell
Diamond like crystal
Column VB
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N, P, As …
5 electrons in outer shell
Crystal structure of Silicon
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Diamond like
Tetrahedral bonds
Hard
Brittle
Intrinsic Semiconductor
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2D representation of
crystal lattice
Semiconductor
All electrons paired
Valence band filled
No-conduction
n-Type Semiconductor
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Electron donor
impurity
Column V (As, P)
Low concentration
≈1:108
Add ‘free’ electron
Electron Movement
 conduction
As
p-Type Semiconductor
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Electron acceptor
impurity
Column III (Boron)
Low concentration
≈1:108
Add ‘hole’
Hole Movement
 conduction
B
pn Junction
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n-type & p-type 
junction
Spare electrons from ntype fill holes in p-type
 depletion region
n-type –ve
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depletion region shrinks
forward bias (conduction)
n-type +ve
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depletion region grows
reverse bias (no
conduction)
n
p
-ve
n
p
+ve
+ve
n
p
-ve
First Transistor 1947
Brattain, Bardeen & Shockley
p
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n
p
Point contact
PNP junction
Ge
NPN Bipolar Junction Transistor
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Emitter at ground
+ve voltage on collector
Collector-Base reverse
biased
 no current
Apply +ve voltage on
base
Electrons pulled from
emitter into base
Collector base depletion
region shrinks
 many electrons flow
from Emitter to
Collector
Collector
n
p
Base
n
Emitter
Shockley and Silicon Valley
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1955
 Shockely
leaves Bell
 Forms Shockley Semiconductor in Palo Alto, CA
 12 keen young engineers
 ‘Difficult’ management style
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1957
 Staff
leave (The Traitorous 8) & form Fairchild
Semiconductor
From Germanium to Silicon
Germanium rare but easier to refine
 Silicon Common
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 25.7%
of earth crust
Electric Arc refining
C
SiO2  C 1900

 Si  CO2
 Silicon forms stable oxide
 Better electrical and mechanical
properties
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Refining
Pure material crystallises
first from melt
 Impurities left behind
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Printing Transistors on Silicon
Planar process developed at Fairchild
 Possible to dope n-type so it becomes ptype and vice versa
 Use of Silicon Dioxide (SiO2) as mask for
processing
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Planar Transistors
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Emitter
Base
Collector
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n
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Vertical Transistor
n-Substrate
Grow Oxide
Pattern & etch oxide
Diffuse p-dopant
Grow Oxide
Pattern & etch oxide
Diffuse n-dopant
Grow Oxide
Pattern & etch oxide
Metal Contacts
Review of Lecture 8
Metals, Insulators & Semiconductors
 The junction diode
 The bipolar transistor
 Planar Processing
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References
Where to go for more Information
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inventors.about.com/library/weekly/aa061698.htm
US Patent 2524035
www.eepatents.com/feature/2524035.html
Intel Education programme
www.intel.com/education/transworks/
Principles of semiconductor devices ecewww.colorado.edu/~bart/book/book/
Webelements.com
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The Britney Spears guide to Semiconductor Physics
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britneyspears.ac/physics/basics/basics.htm www.icknowledge.com
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