Transcript CISC

CISC
What is it?
 CISC - Complex Instruction Set Computer
 CISC is a design philosophy that:
 1) uses microcode instruction sets
 2) uses larger + “richer” instruction sets
 3) builds high level instruction sets
Microcode
 Sets of simple instructions that correspond to
machine language instructions.
 Found in local memory.
 (1 set per machine language instruction)
- machine language instruction is read by
processor and the corresponding set of
instructions is performed.
 Helps improve speed by reducing the number of
instructions coming from outside the CPU.
Microprogrammed Implementation
 Uses built in memory (in CPU) to contain microcode
instructions sets
 Uses microcode instruction sets to control a simple data
path logic; avoids using hardwire logic to decode
instructions (more complex); improves speed.
 Is easier to modify than hardwired logic since the
instruction sets are contained within the CPU.
 Relying on CPUs for uniform instruction sets allows
programs to be moved from one computer to another
and run without need for rewiring or recompiling.
(improves compatibility)
Richer Instruction Sets
 Reduces the amount of code needed to
implement a program.
 Helps reduce the amount of code
programmers need to write.
 Some are even aimed specifically to
reduce amount of coding for ASM
programmers.
High Level Instruction Sets
 Instruction sets corresponding to
instruction from higher level languages
(FORTRAN, Pascal, C)
 Reduces number of instructions sent by
high level language compilers.
 Reduces the complexity of compilers
CISC Instructions Set Features
 2 – operand format
 Register to register, register to memory,
memory to register commands
 Multiple addressing modes for memory.
(array indexes, pointers)
 Variable length instructions.
 Instructions which require multiple clock
cycles. (mult, div)
CISC Hardware Features,
Drawbacks
 Main processor has built in memory that contains
microcode instruction sets.
 uses less transistors; Makes efficient use of memory.
 Has special purpose registers (for stack pointers,
interrupt handling)
 Has a “condition code" register (for comparisons >, <,
=,!, etc)
 Small number of general purpose registers
 Rarely used hardwired instruction sets (wastes chip
space, slows performance, generates extra heat)
Examples of use:
 Motorola 68K series (early Apple
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Macintosh)
Intel(R) 80x86 series (PCs)
IBM 360, 370 series (mainframes)
DEC VAX
DEC PDP-11 (minicomputer)
History:
 1964, IBM develops System/360, the first CISC
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computer.
1970s, performance testing showed that most
instructions used when running programs were simple
instead of complex; CISC design was found to be less
efficient than previously thought.
1980s, first RISC computers built.
1980s-1990s, RISC beginning to displace CISC in
embedded applications (game consoles, cell phones).
2000s, modern CISC designs dropped or are becoming
more like RISC using subsets of instructions that
resemble RISC architecture (Pentium 4) .
CISC vs RISC
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Complex chip design
Has large instruction set.
Emphases workload on hardware
Uses more complex instruction; results
in easier coding.
Uses multithreading to improve
performance
Uses less memory; cheaper
Complex instructions already
hardwired into CPU
less general purpose registers in favor
of special purpose registers and
instruction sets
Improves execution time by reducing
number of instructions
Ideal CISC – 1 instruction per cycle
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Simple chip design
Has small instruction set.
Emphases workload on software
Uses reduced instructions; results in
better clock synchronizing.
Uses pipelining (and/or multithreading)
to improve performance
Uses more memory; more expensive
Needs lots of simple code to simulate
a complex instruction (may be fixed by
more complex compiler code)
More general purpose registers in
favor of speed
Improves execution time by reducing
number of cycles per instruction
Ideal RISC – multiple instructions per
cycle
Disadvantages of CISC
 Instruction sets from previous processor families
are kept, so chip design becomes more complex
over time
 More complex instruction sets means longer
cycle times to finish an instruction
 Some extra instruction sets aren’t used often.
 Condition code (flags for <, >, =, !, etc) is
changed with every instruction, so programmers
will need to check immediately after (if they need
it)
Sources
 www.webopedia.com/TERM/M/CISC.html
 meseec.ce.rit.edu/eecc250-winter99/2502-14-2000.pdf
 www.laynetworks.com/CISC.htm
 ciips.ee.uwa.edu.au/~morris/CA406/CISC.
html
 www.aallison.com/history.htm