Front-end electronics for radiation sensors - INFN

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Transcript Front-end electronics for radiation sensors - INFN

Front-end electronics for radiation sensors:
basic principles and applications to homeland
security
Angelo Rivetti – INFN Sezione di Torino
NATO workshop – Yalta, May 18th 2005
Outline
 Integrated multi-channel front-end architecture
 analogue readout
 binary readout
 mixed-mode readout
 technological considerations
 Application to security problems
 The context
 Some solutions: a very incomplete overview
 Conclusive remarks
NATO workshop – Yalta, May 18th 2005
Analogue readout (1)
T&H
FE
T&H
FE
T&H
Digital
Digital logic
logic
MUX
MUX
FE
FE=preamplifier+shaper
ADC
ADC
Trigger driven event
data selection
Trigger, clk, ctrl
+ Low amount of data
+ Low power
+ Preserve analogue information (only the peak of the signal is sensed)
- Transmission of analogue signals to the external ADC.
NATO workshop – Yalta, May 18th 2005
Design example: self triggered sampling
Vdd
FE
Vin
+
CH
After Ref [1], [2].
NATO workshop – Yalta, May 18th 2005
Two phase PDH
 Concept developed at Brookhaven and based on a novel peak detector designed
by the BNL instrumentation division (G. De Geronimo et al.).
 Two-phase scheme to optimize accuracy and driving capability.
Vout
Vdd
Vin
-
-
+
+
Vos
Vos
CH
CH
Write phase
Vdd
Read phase
NATO workshop – Yalta, May 18th 2005
Peak detection and derandomization
PD1
Vin
PD2
PDN
Vout
Event driven event
data selection
Control logic
NATO workshop – Yalta, May 18th 2005
Peak detection and derandomization (2)
PD1
PD1
Vin
PD2
PD2
Vout
PDN
PDN
Control
Control logic
logic
“Brute force” approach
Alternative approaches
NATO workshop – Yalta, May 18th 2005
Peak detector features
 Self triggered system: ideal for spectroscopy application
 Low power consumption
 Derandomization: ADC sampling rate can be tuned on the average
event rate
 Data concentration: only the interested pulses are read-out, while
baseline samples are disregarded.
 Technology: 0.35 mm CMOS @ 3.3 V.
 Cell area: 340 x 50 mm2 (analogue) + 245 x 50 mm2 (digital)
 Absolute accuracy: 0.2 % for 2.7 Volt input range and 500 ns shaping
time
NATO workshop – Yalta, May 18th 2005
Application example
Spectrum of
241Am
taken with a system using the PDH circuit (After [2]).
NATO workshop – Yalta, May 18th 2005
Mixed-mode readout
 Strictly speaking most front-end ICs incorporate some digital
functions and are mixed-mode design.
 We focus here on “digitizing” front-ends. The analogue information is
preserved and the information is digitized on board of the ASIC.
 The key advantage is that only more robust digitized data must be
sent out of the chip.
 In most applications in high-energy and nuclear physics the signal need
to be captured only at specific time instants.
 An analogue memory is used to sample rapidly changing signals with low
power consumption.
 A slower ADC converts only pre-selected samples.
NATO workshop – Yalta, May 18th 2005
Sampling channel.
Buffer
FE
C0
C1
CN
 Compact and fast sampling.
 Up to 512 sampling cells/channel have been implemented [3].
 Several architectures are possible
 Voltage-write Voltage-read approach minimizes capacitance nonidealities.
NATO workshop – Yalta, May 18th 2005
The simplest ADC
Vin
Digitized data
BN-1
Latch
B1 B0
analogue voltage ramp
Counter
Clk, ctrl
 Simple and suitable for massive parallelism.
 Low power consumption.
 Slow (Tconv = 2N Tclock).
 Most common approach in HEP ASICs, but other architectures
(SAR, pipeline, etc.) have also been used.
NATO workshop – Yalta, May 18th 2005
A mixed-mode readout example (1)
S. Kleinfelder, “Gigahertz Waveform Sampling and Digitization Circuit Design
and Implementation”, IEEE Transaction on Nuclear Science, Vol. 50, No. 4,
August 2003.
Circuit performance (ATWD chip):
 4 channels with 128 sampling cells/channel
 Sampling frequency from 50 kHz to 2 GHz.
 Input bandwidth: 350 MHz.
 Noise: 1mV rms.
 Signal to noise ratio: 3000 : 1.
 10 bit on chip digitization.
 No fast external control signals.
 128 Wilkinson-type ADCs.
 Power consumption: 37 mW/channel @ full speed.
 Technology: 1.2 mm CMOS!
NATO workshop – Yalta, May 18th 2005
A mixed-mode readout example (2)
Sampling instant is defined by a pulse, delayed
by a complex delay-line with adjustable delay.
After sampling, all the 128 samples in one
channel are digitized simultaneously by the 128
Wilkinson-type ADC.
The comparator and the latches are individual,
the counter and ramp generator are shared
among all the converters.
Vin
Digitized data
BN-1
Latch
B1 B0
analogue voltage ramp
Defines the sampling interval
Counter
Clk, ctrl
NATO workshop – Yalta, May 18th 2005
A mixed-mode readout example (3)
Simplified schematic (left) and example of
of signal captured and digitized by the chip
(top; time scale is 10 ns/div). (After [3]).
Total dead time: < 100 ms, most due to data
transmission.
NATO workshop – Yalta, May 18th 2005
Binary readout
FE
VTH
FE
VTH
Digital pipeline
Digital pipeline
 Early and simplest for of A/D conversion.
 Information on amplitude is lost.
 Heavy information suppression: less data but system can be more
difficult to debug.
 Very often requires threshold adjustment on a channel by channel
basis
NATO workshop – Yalta, May 18th 2005
Analogue readout in the ALICE ITS
Average power consumption:
360 mW/ch @ 1.4 ms and 2.5
Power supply (After[6]).
HAL25
Active shaper
NATO workshop – Yalta, May 18th 2005
Mixed-mode readout in the ALICE ITS
The ASICs incorporates all the biasing circuitry on board and works with 4
SMD capacitors of 100 nF
NATO workshop – Yalta, May 18th 2005
Binary readout in the ALICE ITS
Scheme of an individual pixel (after [6]).
Front-end detail(after [7]
NATO workshop – Yalta, May 18th 2005
What next?
 In the recent past deep submicron CMOS technologies became very
popular in the design of front-end ASICs for particle detectors.
 Quarter micron processes offer very good compromise between
performance, cost and “simplicity” of use.
 Quarter micron processes are very mature (obsolete?!), 0.13 mm in
full production, 0.09 mm not very far away…
 Scaling is driven by need of improving the performance of digital
circuits (most of the markets).
 Not too much consideration for the need of analogue designers
 No consideration at all for the need of HEP (we are irrelevant
costumers!)
NATO workshop – Yalta, May 18th 2005
Scaling....
However, scaling can be very beneficial also to our applications!
After P. Fisher, “Readout of Pixel detectors : some thoughts on the next chip
Generation”, presented at Vertex 2001.
NATO workshop – Yalta, May 18th 2005
Scaling and analogue
 Some properties of the transistors which are important for
analogue design tend to improve with scaling the technology (but not
the transistor itself!).
 Gate oxide thickness is reduced, also the power supply is.
 If the power budget in my front-end channel is constant, I can use
more current to get the same (or better performance), but…
 Power dissipation in cable is increased!!
 Cooling will be even more an issue.
NATO workshop – Yalta, May 18th 2005
A closer look
Power dissipation in class A amplifier
V  V sin 2ft
dV
 V 2f cos 2ft
dt
I  2f , 
V
I V
C
in
0
in
0
pol
0
pol
0
2f
C
L
L
Pwr  I polV dd  8kTf
I
pol
SNR
1
 
vol
1
curr
NATO workshop – Yalta, May 18th 2005
A closer look
 For the same power, analogue performance may decrease due to
the reduced supply voltages.
 Cost will increase by a big amount (4x form 0.25 to 0.13 generation:
600k$ for a typical set of mask!)
 Complexity of the technology will increase (huge design rule
manuals!), with increase in design time.
 New phenomena will come into play (nonlinear output conductance,
gate current…)
 Front-end designs (massive parallelism, i.e. repetition of the same
structures along the chip) can be prone to yield problem.
 Stick strictly to the recommended rules!
 Enlarge design groups to master the complexity of the designs and
maximize the potential of the technology.
From detector specific ASICs to reconfigurable chips
NATO workshop – Yalta, May 18th 2005
Disclaimer…
Applications to security issues: a
front-end designer point of view!
NATO workshop – Yalta, May 18th 2005
Applications to security issues: the context
 The September 11th facts have boosted the emphasis on the
improvement of existing techniques or developments of new ones
that can help in preventing terrorist strikes.
 Nuclear Science provides key competences and techniques in two
major areas:
1. Detection of conventional explosives and weapon.
2. Identification of radiological and nuclear threats.
 The body of knowledge developed by the nuclear and high energy
physics basic research community can be exploited in a two-fold
way:
1. Exporting and adapting techniques already developed for
basic research purposes.
2. Exporting the competence to devise new solutions.
NATO workshop – Yalta, May 18th 2005
Characteristics of detectors for security
 Passive and active methods.
 Size ranging from handy to containers.
 Distance between the inspected object from contact to
50 – 100 m.
 Very low-noise to maximize sensitivity and reduce false
positives.
 Low-cost and easy to operate.
NATO workshop – Yalta, May 18th 2005
Detecting conventional explosives
 The goal is to find dangerous substances that might be hidden in
small quantity in luggage or in higher quantity in maritime
containers.
 The inspection time has to be short (seconds to minutes).
 The substance is identified by a quantitative analysis (which
elements and in which proportions).
 Element to be identified: nitrogen, oxygen, carbon, hydrogen.
 Need of penetrating probes:
1. Neutron based systems.
2. Gamma ray based systems.
3. Others.
NATO workshop – Yalta, May 18th 2005
Detecting nuclear material
 Finding significant amount of fissile material.
 Note: some fissile material, like
its low activity!
235U
is difficult to detect due to
 Identifying elements used in civil applications (e.g. radioisotopes
used for medical applications) that might be exploited for “dirty”
bombs.
Emphasis is on gamma ray and neutron detectors
NATO workshop – Yalta, May 18th 2005
Gamma ray detectors
Comparative table of
Gamma ray detectors
(After[7]).
NATO workshop – Yalta, May 18th 2005
Application example (1a)
[9] Rahmat Aryaeinejad and David F. Spencer: “Pocket Dual
Neutron/Gamma Radiation Detector”, IEEE Transactions on
Nuclear Science, vol. 51, no. 4, August 2004, pp. 1667-1671.
 Portable system capable of simultaneous detection of neutron
and gamma ray.
 Sensor: combination of 6Li and 7Li.
 Detector: PM tube with front-end electronics based on
commercial components.
 Analogue signal processing + control and data manipulation via a
microcontroller.
 Operated via a Li-ion battery.
 Size: 1.5 x 3.5 x 4 inch.
NATO workshop – Yalta, May 18th 2005
Application example (1b)
System layout (after[9]).
NATO workshop – Yalta, May 18th 2005
Application example (1c)
Performance example with a Cf-252 source (after [9])
NATO workshop – Yalta, May 18th 2005
Application example (2a)
T. O. Tümer et al. “Preliminary Results Obtained from a
Novel CdZnTe Pad Detector and Readout ASIC Developed
for an Automatic Baggage Inspection System”, presented
at the 2000 IEEE NSS-MIC Symposium, Lyon, France.





Sensor: linear pad detector array.
Pad size: 1 mm2
Sensor material: CdZnTe.
Detection: x-ray in the 20 keV – 200 keV range.
Readout: custom designed front-end chip (FESA).
NATO workshop – Yalta, May 18th 2005
Application example (2b)
[11] M. Clajus et al., “Front-End Electronics for Spectroscopy
Applications (FESA) IC”, presented at the 2000 IEEE NSS – MIC
Symposium, Lyon, France, October 2000.
 Integrated circuit with 32 channels.
 Each channel:
 preamplifier + two-stage variable gain amplifier.
 5 comparators and counters to allow coarse pulse height
analysis.
 Gain and baseline adjustable channel by channel.
 Thresholds common to all channels.
 Counting rate > 1M counts/sec.
 Chip size: 7.3 x 10.0 mm2.
NATO workshop – Yalta, May 18th 2005
Application example (2c)
Counter
VTH5
Counter
CSA
VGA
Counter
Readout
VTH4
VTH3
Counter
VTH2
Counter
VTH1
NATO workshop – Yalta, May 18th 2005
Other ideas
Active techniques need a probe that should:
 easily penetrate thick materials
 be readily available
 not too expensive
 not too dangerous…
Muon: who ordered that??
Basic idea: to exploit multiple scattering (the nightmare of HEP and nuclear
physicists and of their engineers counterpart…) to identify hazardous materials
(e.g. fissile material hidden in cargo).
A lot of work being done at the Los Alamos National Lab [10].
Mu-Vision [11]: funded by scientists and businessmen to develop commercial
detection systems based on probing materials with cosmic
rays muons
NATO workshop – Yalta, May 18th 2005
Proposed cargo inspection system
NATO workshop – Yalta, May 18th 2005
Concluding remarks
 Very complex and high-performance integrated circuits for the
readout of particle detector have been designed by the nuclear and
high-energy physics community
 The big effort of the LHC electronics development came in a “gold
era”: leading market process was very suitable to the application and
not too expensive.
 This picture is going to change in the future: more complex and
expensive technologies, but we have to live with that!
 The solution: more cooperative effort to share design resources and
costs and a slightly different approach (more flexible and re-usable
chips)
 With the right attitude, more powerful system can be designed
exploiting very advanced CMOS technologies
NATO workshop – Yalta, May 18th 2005
Concluding remarks
 As a critical components in nuclear instrumentation, front-end
electronics finds application to other domain, including security.
 The use of highly integrated front-end electronics improves several
system aspects and reduces cost.
 The designers coming from the basic research environment have the
right knowledge (and may be also the right ASIC!)
 Issue to address: lack in communication between different
communities and shortage of designer time (often “absorbed” also in
other aspects of the system)
NATO workshop – Yalta, May 18th 2005
References
[1] G. De Geronimo, A. Kandasamy, and P. O’ Connor, “Analog CMOS peak detect and hold circuit – Part 2:
Offset-free and rail-to-rail derandomizing configuration”, Nucl. Instrum. Methods.
[2] G. De Geronimo, A. Kandasamy, and P. O’ Connor, “Analog Peak Detector and Derandomizer for HighRate Spectroscopy”, IEEE Trans. Nucl. Science, vol. 49, no. 50, August 2002, pp. 1769 – 1773.
[3] S. Kleinfelder, “Gigahertz Waveform Sampling and Digitization Circuit Design and Implementation”,
IEEE Trans. Nucl. Science, vol. 50, no. 4, August 2004, pp. 955 – 962.
[4] J. Kaplon, et al. “Fast CMOS Transimpedance Amplifier and Comparator Circuit for readout of silicon
strip detectors at LHC experiments”, Proceedings of the 8th workshop on electronics for LHC
experiments, Colmar, France, 2002.
[5] C. Hu et al., “The HAL25 front-end chip for the ALICE silicon strip detectors”,
Proceedings of the 6th workshop for the electronics for the LHC experiments, Krakow, Poland, September
2000.
[6] K. Wyllie et al., “A pixel chip for tracking in ALICE and particle identification in LHCb”, presentation
given at the FEE2000 meeting, Perugia, May 2000.
[7] R. Dinapoli, “An analog front-end in standard 0.25 mm CMOS for silicon pixel detector in ALICE and
LHCb”, Proceedings of the 6th workshop for the electronics for the LHC experiments, Krakow, Poland,
September 2000.
[8] DOE Report (DOE/SC-0062).
[9] R. Aryaeinejad and D. F. Spencer: “Pocket Dual Neutron/Gamma Radiation Detector”, IEEE
Transactions on Nuclear Science, vol. 51, no. 4, August 2004, pp. 1667-1671
[10] L. J. Shultz et al., “Image reconstruction and material Z discrimination via cosmic ray muon
radiography”, NIM – A 509, 2004, pp. 687-694.
[11] www.muonvision.com
NATO workshop – Yalta, May 18th 2005