chapter1_diodes. ppt

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Chapter 1
Diodes
SJTU
Zhou Lingling
1
Outline of Chapter 1
1.1 Introduction
1.2 Basic Semiconductor Concepts
1.3 The pn Junction
1.4 Analysis of diode circuits
1.5 Applications of diode circuits
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1.1 Introduction
• The diode is the simplest and most
fundamental nonlinear circuit element.
• Just like resistor, it has two terminals.
• Unlike resistor, it has a nonlinear currentvoltage characteristics.
• Its use in rectifiers is the most common
application.
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Physical Structure
The most important region, which is called pn junction, is
the boundary between n-type and p-type semiconductor.
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Symbol and Characteristic for the
Ideal Diode
(a) diode circuit symbol; (b) i–v characteristic; (c) equivalent circuit in the
reverse direction; (d) equivalent circuit in the forward direction.
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Characteristics
• Conducting in one direction and not in the
other is the I-V characteristic of the diode.
• The arrowlike circuit symbol shows the
direction of conducting current.
• Forward biasing voltage makes it turn on.
• Reverse biasing voltage makes it turn off.
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1.2 Basic Semiconductor
Concepts
• Intrinsic Semiconductor
• Doped Semiconductor
• Carriers movement
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Intrinsic Semiconductor
• Definition
A crystal of pure and regular lattice structure is
called intrinsic semiconductor.
• Materials
Silicon---today’s IC technology is based entirely
on silicon
Germanium---early used
Gallium arsenide---used for microwave circuits
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Intrinsic Semiconductor(cont’d)
Two-dimensional representation
of the silicon crystal. The circles
represent the inner core of silicon
atoms, with +4 indicating its
positive charge of +4q, which is
neutralized by the charge of the
four valence electrons. Observe
how the covalent bonds are
formed by sharing of the valence
electrons. At 0 K, all bonds are
intact and no free electrons are
available for current conduction.
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Intrinsic Semiconductor(cont’d)
At room temperature,
some of the covalent
bonds are broken by
thermal ionization.
Each broken bond
gives rise to a free
electron and a hole,
both of which become
available for current
conduction.
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Intrinsic Semiconductor(cont’d)
• Thermal ionization
Valence electron---each silicon atom has four
valence electrons
Covalent bond---two valence electrons from
different two silicon atoms form the covalent bond
 Be intact at sufficiently low temperature
 Be broken at room temperature
Free electron---produced by thermal ionization,
move freely in the lattice structure.
Hole---empty position in broken covalent bond,can
be filled by free electron, positive charge
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Intrinsic Semiconductor(cont’d)
• Carriers
A free electron is negative charge and a hole
is positive charge. Both of them can move
in the crystal structure. They can conduct
electric circuit.
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Intrinsic Semiconductor(cont’d)
• Recombination
Some free electrons filling the holes results in the
disappearance of free electrons and holes.
• Thermal equilibrium
At a certain temperature, the recombination rate is
equal to the ionization rate. So the concentration
of the carriers is able to be calculated.
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Intrinsic Semiconductor(cont’d)
• Carrier concentration in thermal equilibrium
n  p  ni
3  EG kT
ni  BT e
2
• At room temperature(T=300K)
ni  1.5 10
10
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carriers/cm3
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Intrinsic Semiconductor(cont’d)
Important notes:
•
•
•
ni
has a strong function of temperature. The high
the temperature is, the dramatically great the carrier
concentration is.
At room temperature only one of every billion atoms
is ionized.
Silicon’s conductivity is between that of conductors
and insulators. Actually the characteristic of intrinsic
silicon approaches to insulators.
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Doped Semiconductor
• Doped semiconductors are materials in which
carriers of one kind predominate.
• Only two types of doped semiconductors are
available.
• Conductivity of doped semiconductor is much
greater than the one of intrinsic semiconductor.
• The pn junction is formed by doped
semiconductor.
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Doped Semiconductor(cont’d)
n type semiconductor
• Concept
Doped silicon in which the majority of charge carriers are the
negatively charged electrons is called n type semiconductor.
• Terminology
 Donor---impurity provides free electrons, usually entirely ionized.
 Positive bound charge---impurity atom donating electron gives rise
to positive bound charge
 carriers
• Free electron---majority, generated mostly by ionized and slightly by
thermal ionization.
• Hole---minority, only generated by thermal ionization.
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Doped Semiconductor(cont’d)
A silicon crystal
doped by a
pentavalent
element. Each
dopant atom
donates a free
electron and is
thus called a
donor. The doped
semiconductor
becomes n type.
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Doped Semiconductor(cont’d)
p type semiconductor
• Concept
Doped silicon in which the majority of charge carriers are the
positively charged holes is called p type semiconductor.
• Terminology
 acceptor---impurity provides holes, usually entirely ionized.
 negatively bound charge---impurity atom accepting hole give rise
to negative bound charge
 carriers
• Hole---majority, generated generated mostly by ionized and slightly
by thermal ionization.
• Free electron---minority, only generated by thermal ionization.
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Doped Semiconductor(cont’d)
A silicon crystal
doped with a
trivalent
impurity. Each
dopant atom
gives rise to a
hole, and the
semiconductor
becomes p type.
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Doped Semiconductor(cont’d)
Carrier concentration for n type
a) Thermal equilibrium equation
nn 0  pn 0  ni
2
b) Electric neutral equation
nn 0  pn 0  N D
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Doped Semiconductor(cont’d)
Carrier concentration for p type
a) Thermal equilibrium equation
p p 0  n p 0  ni
2
b) Electric neutral equation
p p0  n p0  N A
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Doped Semiconductor(cont’d)
Because the majority is much great than the
minority, we can get the approximate equations
shown below:
nno  N D

2

ni
 pn 0 
ND

 p p0  N A

2
for n type 
for p type
ni
n p 0 
NA

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Doped Semiconductor(cont’d)
• Conclusion
Majority carrier is only determined by the
impurity, but independent of temperature.
Minority carrier is strongly affected by
temperature.
If the temperature is high enough,
characteristics of doped semiconductor will
decline to the one of intrinsic semiconductor.
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Doped Semiconductor(cont’d)
• Doping compensation
NA
ND
n type semiconductor is generated by
donor diffusion, then injecting
acceptor into the specific
area(assuming N A  N D ) forms p
type semiconductor. The boundary
between n and p type semiconductor
is the pn junction. This is the basic
step for VLSI fabrication technology.
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Carriers Movement
There are two mechanisms by which holes and free
electrons move through a silicon crystal.
• Drift--- The carrier motion is generated by the electrical
field across a piece of silicon. This motion will produce
drift current.
• Diffusion--- The carrier motion is generated by the
different concentration of carrier in a piece of silicon. The
diffused motion, usually carriers diffuse from high
concentration to low concentration, will give rise to
diffusion current.
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Drift and Drift Current
• Drift
 Drift velocities

vdrift   p E


vdrift    n E
Where  p ,  n are the
constants called mobility of
holes and electrons respectively.
 Drift current densities
J n drift  (qn)  (  n E )  qn n E
J p drift  qp   p E
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Drift and Drift Current
• Total drift current density
J drift  q(n n+p p ) E
• Resistivity
  1 q ( n + p  )
n
p
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Drift and Drift Current
• Resistivities for doped semiconductor
1
For n type
 qN D  n
1
  q(n  p )  
n
p
 1 qN 
For p type
A p

* Resistivities are inversely proportional to the concentration
of doped impurities.
• Temperature coefficient(TC)
TC for resistivity of doped semiconductor is
positive due to negative TC of mobility
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Drift and Drift Current
• Resistivity for intrinsic semiconductor
  1 q (n  p )  1 qn (    )
n
p
i
n
p
* Resistivity is inversely proportional to the carrier
concentration of intrinsic semiconductor.
• Temperature coefficient(TC)
TC for resistivity of intrinsic semiconductor is
negative due to positive TC of ni .
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Diffusion and Diffusion Current
• diffusion
A bar of intrinsic silicon (a) in which the hole concentration profile
shown in (b) has been created along the x-axis by some unspecified
mechanism.
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Diffusion and Diffusion Current
dp ( x)
dx
dn( x)
J n  qDn 
dx
J p   qD p 
where D p , Dn are the diffusion constants or
diffusivities for hole and electron respectively.
* The diffusion current density is proportional to the
slope of the the concentration curve, or the
concentration gradient.
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Einstein Relationship
Einstein relationship exists between the
carrier diffusivity and mobility:
Dn
Dp
kT

 VT 
n  p
q
Where VT is Thermal voltage.
At room temperature,VT  25mv
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1.3 pn Junction
• The pn junction under open-circuit
condition
• I-V characteristic of pn junction
Terminal characteristic of junction diode.
Physical operation of diode.
• Junction capacitance
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pn Junction Under Open-Circuit
Condition
• Usually the pn junction is asymmetric, there
are p+n and pn+.
• The superscript “+” denotes the region is
more heavily doped than the other region.
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pn Junction Under Open-Circuit
Condition
Fig (a) shows the pn
junction with no applied
voltage (open-circuited
terminals).
Fig.(b) shows the
potential distribution
along an axis
perpendicular to the
junction.
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Procedure of Forming pn
Junction
The procedure of forming pn the dynamic equilibrium of
drift and diffusion movements for carriers in the silicon.
In detail, there are 4 steps:
a) Diffusion
b) Space charge region
c) Drift
d) Equilibrium
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Procedure of Forming pn
Junction
• diffusion
Both the majority carriers diffuse across the
boundary between p-type and n-type
semiconductor.
The direction of diffusion current is from p
side to n side.
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Procedure of Forming pn
Junction
• Space charge region
 Majority carriers recombining with minority carriers
results in the disappearance of majority carriers.
 Bound charges, which will no longer be neutralized by
majority carriers are uncovered.
 There is a region close to the junction that is depleted of
majority carriers and contains uncovered bound charges.
 This region is called carrier-depletion region or space
charge region.
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Procedure of Forming pn
Junction
• Drift
 Electric field is established across the space charge
region.
 Direction of electronic field is from n side to p side.
 It helps minority carriers drift through the junction. The
direction of drift current is from n side to p side.
 It acts as a barrier for majority carriers to diffusion.
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Procedure of Forming pn
Junction
• Equilibrium
Two opposite currents across the junction is
equal in magnitude.
No net current flows across the pn junction.
Equilibrium conduction is maintained by the
barrier voltage.
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Junction Built-In Voltage
The Junction Built-In Voltage
N AND
Vo  VT ln
2
ni
It depends on doping concentration and
temperature
Its TC is negative.
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Width of the Depletion Region
Width of the Depletion Region:
Wdepo 
Wdep 
2 1
1
(

)Vo
q N A ND
2 1
1
(

(
) Vo-V )
q N A ND
 Depletion region exists almost entirely on the slightly
doped side.
 Width depends on the voltage across the junction.
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I-V Characteristics
The diode i–v
relationship with
some scales
expanded and
others
compressed in
order to reveal
details
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I-V Characteristic Curve
Terminal Characteristic of Junction Diodes
• The Forward-Bias Region, determined by v  o
• The Reverse-Bias Region, determined by  VZK  v  0
• The Breakdown Region, determined by v  VZK
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The pn Junction Under ForwardBias Conditions
The pn junction
excited by a constantcurrent source
supplying a current I in
the forward direction.
The depletion layer
narrows and the barrier
voltage decreases by V
volts, which appears as
an external voltage in
the forward direction.
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The pn Junction Under ForwardBias Conditions
Minority-carrier distribution in a forward-biased pn junction. It is assumed
that the p region is more heavily doped than the n region; NA >>ND.
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The pn Junction Under ForwardBias Conditions
Excess minority carrier concentration:
p n ( xn )  p n 0 e
v
VT
n p ( x p )  n p 0e
v
VT
 Exponential relationship
 Small voltage incremental give rise to great incremental
of excess minority carrier concentration.
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The pn Junction Under ForwardBias Conditions
Distribution of excess minority concentration:
pn ( x)  pno  [ pn ( xn )  pn 0 ]e
 ( x-xn )
n p ( x)  n p 0  [n p ( x p )  n p 0 ]e
Where
Lp 
D p p
Ln 
Dn n
Lp
( x+x p )
Ln
 n , p are called excess-minority-carrier lifetime.
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The pn Junction Under ForwardBias Conditions
The total current can be obtained by the diffusion current
of majority carriers.
I  I pD  I nD
 A( J pD  J nD )
dp ( x)
 A(  q
dx
 Aq(
D p pn 0
Lp
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x  xn

dn( x)
q
)
dx x   x p
Dn n p 0
Ln
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V
)( e
VT
 1)
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The pn Junction Under ForwardBias Conditions
The saturation current is given by :
I s  qA(
D p pn 0
Lp

Dn n p 0
Ln
)
Dp
Dn
 qAni (

)
L p nD Ln n A
2
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The pn Junction Under ForwardBias Conditions
I-V characteristic equation:
i  I(
s e
•
•
•
•
v
nVT
 1)
Exponential relationship, nonlinear.
Is is called saturation current, strongly
depends on temperature.
n  1 or 2, in general n  1
VT is thermal voltage.
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The pn Junction Under ForwardBias Conditions
assuming V1 at I1 and V2 at I2
then:
V2  V1  nVT ln I 2
I1
 2.3nVT lg I 2
I1
* For a decade changes in current, the diode
voltage drop changes by 60mv (for n=1) or
120mv (for n=2).
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The pn Junction Under ForwardBias Conditions
• Turn-on voltage
A conduction diode has approximately a constant voltage
drop across it. It’s called turn-on voltage.
VD ( on)  0.7V
For silicon
VD ( on)  0.25V
For germanium
• Diodes with different current rating will exhibit the turn-on
voltage at different currents.
• Negative TC, TC  2mv /  C
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The pn Junction Under ReverseBias Conditions
The pn junction excited by a
constant-current source I in
the reverse direction.
To avoid breakdown, I is
kept smaller than IS.
Note that the depletion layer
widens and the barrier voltage
increases by VR volts, which
appears between the terminals
as a reverse voltage.
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The pn Junction Under ReverseBias Conditions
I-V characteristic equation:
i  Is
Independent of voltage。
Where Is is the saturation current, it is proportional to ni2
which is a strong function of temperature.
D p pn 0 Dn n p 0
I s  qA(

)
Lp
Ln
Dp
Dn
 qAni (

)
L p nD Ln n A
2
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The pn Junction In the
Breakdown Region
The pn junction excited by a reverse-current source I, where I > IS.
The junction breaks down, and a voltage VZ , with the polarity
indicated, develops across the junction.
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The pn Junction In the
Breakdown Region
• Supposing I  I s , the current source will move
holes from p to n through the external circuit.
• The free electrons move through opposite
direction.
• This result in the increase of barrier voltage and
decrease almost zero of diffusion current.
• To achieved the equilibrium, a new mechanism
sets in to supply the charge carriers needed to
support the current I.
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Breakdown Mechanisms
• Zener effect




Occurs in heavily doping semiconductor
Breakdown voltage is less than 5v.
Carriers generated by electric field---field ionization.
TC is negative.
• Avalanche effect.




Occurs in slightly doping semiconductor
Breakdown voltage is more than 7v.
Carriers generated by collision.
TC is positive.
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Breakdown Mechanisms
Remember:
pn junction breakdown is not a destructive
process, provided that the maximum
specified power dissipation is not exceeded.
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Zener Diode
Circuit symbol
The diode i–v characteristic
with the breakdown region
shown in some detail.
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Junction Capacitance
• Diffusion Capacitance
 Charge stored in bulk region changes with the change of voltage
across pn junction gives rise to capacitive effect.
 Small-signal diffusion capacitance
• Depletion capacitance
 Charge stored in depletion layer changes with the change of
voltage across pn junction gives rise to capacitive effect.
 Small-signal depletion capacitance
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Diffusion Capacitance
According to the definition: Cd  dQ
dV
Q
The charge stored in bulk region is obtained from below
equations: Q  Aq   [ p ( x )  p ]dx

p
xn
n
no
 Aq  [ pn ( xn )  pno ]  L p
 pI p
Qn   n I n
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Diffusion Capacitance
The expression for diffusion capacitance:
V
d
Cd 
[ T I s e VT ]
dV
(
T
VT
)IQ
 T
)IQ
(
  VT
0

Forward-bias, linear relationship
Reverse-bias, almost inexistence
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Depletion Capacitance
According to the definition: C j  dQ
dVR V
R VQ
Actually this capacitance is similar to parallel plate
capacitance.
A
A
Cj 
=
Wdep
2 1
1
[
(

)(V0  vR )
q N A NB

C j0
(1  VR
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Depletion Capacitance
• A more general formula for depletion capacitance is :
C j0
Cj 
(1  VR ) m
V0
1
1
• Where m is called grading coefficient. m  ~
3
2
1
• If the concentration changes sharply, m 
2
• Forward-bias condition, C j  2C j 0
• Reverse-bias condition, C j  C d
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Junction Capacitance
Remember:
a) Diffusion and depletion capacitances are
incremental capacitances, only are applied
under the small-signal circuit condition.
b) They are not constants, they have relationship
with the voltage across the pn junction.
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1.4 Analysis of Diode Circuit
• Models
Mathematic model
Circuit model
• Methods of analysis
Graphical analysis
Iterative analysis
Modeling analysis
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The Diode Models
Mathematic Model:
i  I s (e
v
nVT
v

 I s e nVT


 I s
 1)
Forward biased
Reverse biased
The circuit models are derived from
approximating the curve into piecewise-line.
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The Diode Models
Circuit Model
a) Simplified diode model
b) The constant-voltage-drop model
c) Small-signal model
d) High-frequency model
e) Zener Diode Model
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Simplified Diode Model
Piecewise-linear model of the diode forward characteristic and its
equivalent circuit representation.
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The Constant-Voltage-Drop
Model
The constant-voltage-drop model of the diode forward characteristics
and its equivalent-circuit representation.
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Small-Signal Model
Symbol convention:
 iD (t ) Lowercase symbol, uppercase subscript stands
for total instantaneous qualities.
 I D Uppercase symbol, uppercase subscript stands
for dc component.
 id (t ) Lowercase symbol, lowercase subscript stands
for ac component or incremental signal qualities.
 I d (t ) Uppercase symbol, lowercase subscript stands
for the rms(root-mean-square) of ac.
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Small-Signal Model
Development of the diode small-signal model. Note that the numerical
values shown are for a diode with n = 2.
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Small-Signal Model(cont’d)
Incremental resistance:
V
rd  T
I DQ
*The signal amplitude sufficiently small such
that the excursion at Q along the i-v curve
is limited to a short, almost linear segment.
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High-Frequency Model
High frequency model
rs
rd
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Zener Diode Model
VZ  VZ 0  I Z rZ
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Method of Analysis
Load line
Diode
characteristic
Q is the
intersect point
Visualization
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Method of Analysis
• Iterative analysis
Refer to example 3.4
• Model Analysis
Refer to example 3.6 and 3.7
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1.5 The Application of Diode
Circuits
• Rectifier circuits
 Half-wave rectifier
 Full-wave rectifier
• Transformer with a center-tapped secondary winding
• Bridge rectifier
 The peak rectifier
• Voltage regulator
• Limiter
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Half-Wave Rectifier
(a) Half-wave rectifier.
(b) Equivalent circuit of the half-wave rectifier with the diode replaced
with its battery-plus-resistance model.
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Half-Wave Rectifier
(c) Transfer characteristic of the rectifier circuit.
(d) Input and output waveforms, assuming that rD  R
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Full-Wave Rectifier
(a) circuit
(b) transfer characteristic assuming a constant-voltage-drop model for
the diodes
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Full-Wave Rectifier
(c) input and output waveforms.
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The Bridge Rectifier
(a) circuit
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The Bridge Rectifier
(b) input and output waveforms
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86
Peak Rectifier
Voltage and current
waveforms in the peak rectifier
circuit with CR  T .
The diode is assumed ideal.
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Zhou Lingling
87
Voltage Regulator
We define:
Lineregula tion 
Vo
Loadregula tion 
Vo
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Zhou Lingling
Vs
I L
88
Limiter
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Zhou Lingling
89
Limiter
Applying a sine wave to a limiter can result in clipping off its two peaks.
SJTU
Zhou Lingling
90
Soft Limiting
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Zhou Lingling
91