Transcript ABC`s of POWER ELECTRONICS

ABCs of Power
Electronic Systems
By
Dr. Doug Hopkins & Dr. Ron Wunderlich
DCHopkins & Associates
Denal Way, m/s 408
Vestal, New York 13850-3035
[email protected]
© 2006 DCHopkins
www.DCHopkins-Associates.Com
Our Professional Challenge
“The illiterate of the 21st century will not be
those who cannot read and write, but those
who cannot learn, unlearn and relearn.”
-- Alvin Toffler
Dr. Toffler, Ph.D., is one of the world's preeminent
futurists. As co-author of War and Anti-War, he sketches
the emerging economy of the 21st century, presenting a
new theory of war and revealing how changes in today's
military parallel those in business.
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About the Course Authors?
• Dr. Doug Hopkins
– PhD. Virginia Tech, VA Power Electronics Center
– GE-CR&D, Carrier Air Conditioning Company(UTC), University
at Buffalo, and DCHopkins & Associates (President)
– R&D for advanced power electronic systems
– [email protected]
• Dr. Ron Wunderlich
– Ph.D. Binghamton University
– IBM Power Systems, Celestica Power Systems, Transim Corp,
and Innovative Design and Development (President)
– Chief Engineer in design and development of power supplies for
the computer and telecom industries.
– [email protected]
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Course Topics
1. Overview of Power Electronics Technology
1a. Introduction to the power electronics system
2. Knowing your specifications
2a. Design for safety
3. Choosing the correct topologies
3b. Knowing where disaster can strike
4. Characterizing power components
4a. A safe operating area
4b. The dual faces of MOSFETS
4c. The circuit is a component
5. Design approaches and tools
5a. Simulating reality
5b. Input filtering
6. Design approaches and tools
6a. Design case study
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DCHopkins & Associates - Products
Products designed by our Associates,
photographed by our Associates.
• 600W family of isolated DC/DC
building blocks
• Multi-output telecom power supply
Pictures courtesy of Celestica, Incorporated
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DCHopkins & Associates - Products
• 30A high efficiency, hightransient isolated power supply
• Isolated power supply for highend micro-processor
Pictures courtesy of Celestica, Incorporated
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News Sources
Where to go for news (other than suppliers)?
•
•
•
•
•
•
•
•
http://www.darnell.com (PowerPulse Daily)
http://www.poweronline.com (see electricnet)
http//www.electricnet.com (see poweronline)
http://www.powersystems.com
http://www.eedesign.com
http://www.psma.com
http://www.ejbloom.com (see attached catalog)
Conferences:
– http://www.pels.org (the IEEE Power Electronics Society)
• http://www.apec-conf.org
• http://www.pesc06.org
• http://www.intelec.org
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Introduction to
The System
Source
Load
Power
Processor
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Conversion or Supply
“Conversion” changes one energy form to another.
Source
Electrical Source
Power
Processor
Load
Types of Loads
Motor drives
• Linear
• Rotational
Lighting
• Fluorescent
• HID
• Halogen
Pulsed power
• Ignition
• Flash lamp
• Pulsed propulsion
POWER CONVERSION
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Conversion or Supply
“Supply” changes only the attributes.
LOAD
Source
Power
Processor
Load
Computer Applications
– Desktops
Handheld Applications
– Workstations
Telecom Applications
– PDA’s
– Servers
– Notebooks
– Routers
– Mainframes
– Cell-phones
– Tele. Switches
Circuits:
Circuits:
Circuits:
– CPU
– RF Amps
– Optical Amps
– Memory
– CPU/Logic
– CPU
– Bus Terminators
– Memory
– Memory
– Logic
– Display
– Switch Cards
– Graphics
– Audio Amps
– Logic
POWER SUPPLY
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Uninterruptible Power Supply Systems
• Electronic Circuits are
– Any electronic equipment that requires clean, reliable AC utility
• Computers, Telecom equipment, Home appliances
• Sources are
– DC such as a battery or solar cells
– AC utility that is of poor quality
Voltage
Time
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Power
Processor
Electronic
Circuit
Voltage
Noisy AC
Utility
Clean AC
Utility
Time
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The System - Source Characteristics
Source
Power
Processor
Load
SOURCE
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IF THE SOURCE
THEN THE LOAD
matches the load
is directly regulated
has over capacity
flashlight
generator field control
requires regulating circuit
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The System - Source Characteristics
Source
Power
Processor
Load
THE POWER PROCESSOR
Converts an unregulated power source to a regulated output.
Like CPU’s processing information - Power Supplies process energy.
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Linear Regulator
Switch-mode Regulator
Absorbs the energy
difference
Chops and averages
energy packets
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Knowing Your
Specifications
and the
User’s Requirements
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Developing User Requirements
Responsible Design is from Cradle to Grave
• Typically, User Requirements are derived through a
polling process.
• This brings forward the highest-priority
requirements, but are limited to personal experiences.
• A comprehensive approach uses a matrix of
Five Taxonomies
and
Three Characteristics
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Grouping User Requirements
Characteristic
Unspoken Expectations
Articulated Needs
Unexpected Features
Taxonomy
Financial
Legal
Social
MATRIXED
Environmental
Technical
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Taxonomies in User Requirements
• Financial requirements: represent cost and is base metric for
other matrix entries.
• Legal requirements: include intellectual property as a source of
revenue, strategic positioning or enticement.
• Social requirements: represent the corporate culture and image,
global perceptions, and ethical conduct.
• Environmental requirements: represent government regulations
and broader global concerns.
• Technical requirements: science based metrics related to
‘energy forms’ and provide the “SPECIFICATIONS.”
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Characteristics of User Requirements
• Unspoken Expectations:
– requirements for a product, process or service to be acceptable to
all end users. Though labeled as unspoken, these may be new
requirements that develop while a business has not been keeping
up with the competition or market place, or basic requirements
for entry into new markets.
• Articulated Needs:
– typical, open and printed “specifications. ” Discerns one user
from another. There should be no question that these needs are
requirements that must be met for each user.
• Unexpected Features:
– exciters that make the product, process or service unique and
readily distinguishable from the competition. (This is what the
sales force lives for.) Features are speculative requirements.
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Example User Requirements
• Unspoken Environmental Expectation:
the product is not lethally hazardous to shippers
• Articulated Technical Need:
the products will operate from -40°C to +100°C.
• Unexpected Legal Feature:
the product can have exclusive patent protection.
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Defining Specifications
Power electronic circuits condition and convert
many energy forms!
Iin
• Electric
• Magnetic
Vin
Iout
Power
Supply
Vout
• Electromagnetic
• Thermal
• Mechanical
Technical User Requirements
provide the
• Chemical
SPECIFICATIONS
• Photonic
for each Energy Form.
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Framework leading to Specifications
Responsible Design is from Cradle to Grave.
Taxonomies
Characteristics
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Technical Characteristics
– Energy Forms
– Conditions
• Start-up
• Shut-down
• Normal operation
• Fault operation
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Electrical Specs
Electrical Spec
Input
AC
DC
Vin, Iin
Vin, Iin
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Output
Controls
Misc
Vout, Iout
PGood, On/Off
Efficiency
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DC Input Spec
Specifying Vin depends on the source voltage range.
• Typical DC sources:
– Car Battery  typical 12 volts with 11 to 14 volts variation
– Solar Cell  0.5 to 1 volt per cell depending on sunlight
– Telecom Bus  typical 48 volts with 36 to 72 volts variation
– PC Internal 5V Bus  5 volts, +/- 10%
• Example: A Telecom bus has a Vin operating range of 36 to 72 volts
– If the input voltage drops below 36V, typically, a PS will shut down.
– If the input voltage exceeds 72V, typically, a PS will be damaged by the
excessive high voltage.
• A PS can be designed so it can handle short duration of high
input voltage such as line transients due to lightning.
• This is known as a surge rating.
• For example, this PS may have a surge rating of 100V for
100usec.
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DC Input Spec - Iin, Pout, Pin, 
Iin is the current drawn by the PS and derived by
• Pout (output power) = Vout x Iout
• Pin (input power) = Vin x Iin
•  (efficiency of the PS) = Pout / Pin
– Typically between 0.5 to 0.98
• Substituting and solving for Iin
Iin = (Vout x Iout) / (Vin x )
Note: Worst case - Iin occurs at lowest value of Vin, e.g.
for telecom PS most current is at Vin=36 volts.
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DC Input Spec
Iin will have ripple current, Irip, from the switching
stage within the PS.
• Specified as peak-to-peak.
• Occurs at usually < 10Mhz
• Typically, < 10% of max Iin
• E.g., if Iin max is 10A, Irip p-p
should < 1A
Irip
Iin
Time
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DC Input Spec
• Iin will have switching
noise that occurs at
>10Mhz.
Iin
Iin will have switching noise.
• The noise is due to the
internal capacitive coupling
parasitics
• Typically, the peak-to-peak
noise is less than 1% of max
Iin
Time
Iin
Vin
Time
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DC Input Spec
Iin will have a surge during start-up.
• Surge current, Isurge, is due to
charging of internal capacitors
Iin
Vin
• Usually Isurge is less than 5
times max Iin
• This can cause problems with
fusing.
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Time
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AC Input Spec
Specifying Vin depends on the source voltage range
• Typical AC sources for the home
– Doorbell, heating systems  24Vrms +/- 30%
– Household wiring  Typically 110Vrms with 90 to 130 range
– Electric stoves  Typically 220Vrms with 180 to 260 range
• Actually, 220Vrms with a center-tap is delivered to the home.
110Vrms is derived from the center-tap
• Typical AC sources for business (single phase derived from
three phase)
– Office wiring  Typically 120Vrms with 90 to 140 range
– Industrial/Computer  Typically 208Vrms with 180 to 260
– Smaller businesses will use the household AC utility
• Europe and some other countries are wired with either
208Vrms or 220Vrms
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AC Input Spec
• Vin for typical products
–
–
–
–
–
Desktop PC sold in the US, 90Vrms – 140Vrms
Desktop PC sold Worldwide, 180Vrms – 260Vrms
High-end servers sold worldwide, 180Vrms – 260Vrms
Desktop PC with “universal” PS, 90Vrms – 260Vrms
Why not use a “universal” PS in all desktop PC’s ?
• “Universal” PS are more expensive and difficult to design
• Operating frequency for Vin is specified as
– USA - 60Hz; Europe and other countries - 50Hz, range is +/-3Hz
• A “universal” PS operates from 47Hz to 63Hz
– This is not a cost or a design problem
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AC Input Spec - Vin-rms
Vin is from the wall outlet or a UPS
for “Off-Line”converters
• Vin is understood to be Vin-rms;
Vpk
Voltage
• AC sources are:
– Single Phase
– Three Phase (>5kW, not covered)
– Vin-rms = Vpk / 1.4142 *
• RMS makes calculations easier
– For DC, Pin = Vin x Iin
– For AC, Pin = Vin-rms x Iin-rms
Time
Iin
* For single frequency sine wave
Vin
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Iout
Power
Supply
Vout
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AC Input Spec - sags, surges, and transients
• AC voltage will have transients and surges
– 2000V spikes are not uncommon
• Florida is the worst US state
– Due to lightning, industrial equipment and solar flares
– The “front-end” PS circuitry must be able to shunt this energy
The PS cannot have direct connection between input and output.
Hence, isolation is required. This is a safety requirement.
• AC supply has brown outs, sags, or drop outs in power
– This occurs when
• The utility transformer in a sub-station goes bad
• The grid becomes overloaded from air-conditioners, etc.
• Solar flares induce too much voltage and “pop” the breakers
– These occur quite often
• More than 99% of the drop outs are less than 20ms in length
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AC Input Spec - Hold-up Time
When AC momentarily is interrupted
• For non-mission-critical devices
– e.g., televisions, radios, VCRs
– PS can shut down temporarily
• For mission-critical devices
– e.g., high-end servers
– PS shall maintain operation for a loss of AC up to 20ms
– After 20ms it can shut down
This is known as hold-up time
• This is accomplished by a large energy storage device such as
a capacitor in the input (PFC).
– Typical specifications for hold-up is 20ms.
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AC Input Spec - Power Factor
Ideally, Iin should follow Vin emulating a resistor
• A bridge rectifier with a large
capacitance is usually at the PS
input.
– Iin, with respect to Vin, will be
distorted.
– Iin-rms is now significantly
higher than for a resistor input
to have the same usable energy
flow.
– The distortion adds frequency
harmonics.
Vin
Iin
Time
Vin
Iin
Time
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AC Input Spec - Power Factor (con’d)
• Apparent power is Pa = Vin-rms x Iin-rms
• Real power is the average Pr = Vin x Iin
• Power Factor, PF
PF = Real Power / Apparent Power
• The lower the PF, the higher the Iin-rms for the given power
• The problems with lower PF are
– Wire sizes must be increased to handle the higher Iin-rms current
• Power Loss increases by the square of current!
– This is extra power for which the feeders and fuses must be size
– Iin is rich in harmonics which adds noise and circulating currents
in 3-phase systems
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AC Input Spec - Inrush Current
Like DC, Iin has inrush issues with AC applications.
• Usually, peak Iin is specified to be <5X the steadystate Iin-rms.
• Another factor to consider is fusing and circuit
breakers.
• If the inrush current is too high or can occur
throughout the day, fuses and circuit breakers can be
weakened, damaged, or open up.
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AC Input Spec - THD
Total Harmonic Distortion, THD the same for your stereo as for the power supply
• Any waveform can be broken down into a sum of sine
waves with different amplitudes
• If there is any distortion, then
–
–
–
–
I = 1.414 x [I1sin(2ft)+I2sin(4ft)+I2sin(6ft)+…]
I1 is the rms of the “fundamental” current waveform
I2 is the second-order harmonic, I3 is third, etc.
The Total Harmonic Distortion is then
THD = {sqrt[ (I2)^2 + (I3)^2 + (I4)^2 + …] / (I1)} x 100%
• A good value for THD < 5%
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AC Input Spec - Noise
Conducted versus Radiated Noise
• Conducted noise current is measured on the line cord.
– The frequency is less than 30Mhz
– A “LISN” box is connected to the cord to filter out the 50/60hz
– A frequency-spectrum analyzer then displays the noise spectrum
• Federal specifications must be met
• If the frequency is > 30Mhz, this is known as radiated
– This is measured with an antennae usually 10 meters away
– At these frequencies, line cords and cables become very effective
antennae
• Federal specifications that must be met
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Vout Specs
Line, Load &
Temperature
Load Step
VOUT
Ripple & HF
Noise
Long Term
Stability
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Static Regulation
• Line Regulation
– % change in output voltage versus input voltage at a given load
– Typically 1-2%
• Load Regulation
– % change in output voltage versus load at a given input voltage
– Typically 0.1-3%
• Vout Temperature Effect
– % change in output voltage versus temperature for given input
and load
– Typically 0.2-1%
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Static Regulation
• Cross-Regulation (multi-output converters)
– Change in output voltage of channel 2 for a change in load on
channel 1 at a given input voltage
– Typically 0.1-10%
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Dynamic Regulation
Change in output voltage is due to the dynamic behavior
of the power supply
• The output voltage initially
changes because of the I step
x ESR of the output cap (5A
x 0.3ohms)
• The second part is due to the
loop response of the
converter
• The change in output voltage
is measured from the
nominal output voltage
• 5% for this example
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Dynamic Regulation
Another effect shows up as L x (di/dt)
• This is due to inductance of
– Output capacitor
– Connector
– Bus distribution
• This is not always included in
the spec.
• Could typically be < 5%
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Ripple and Noise
– Triangular-shaped current at
the switch frequency
– Due to inductor current x
ESR of output cap
Vout
• Ripple
Time
• Typically 0.2-3%
Voltage
• High Frequency Noise
– Noise > 10 x fSW
– Either random or the
excitation of high-frequency
parasitics.
Vrip
Time
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Drift
Over time, a reference voltage can change.
• Drift is due to
– Aging
– Soldering
– Package compression
• Typically < 0.2%
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Question -
How can you improve the transient response
of the converter without…
changing the components or
changing the switching frequency?
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Answer
• Use adaptive control
(positioning)
– At no load, start at +X1%
above nominal Vout
– At full load, change Vout to be
X2% below nominal Vout
• In the previous example,
dynamic regulation was 5%
• This can be changed to 3%
dynamic regulation by
modifying VREF for the control
loop scheme
• Common in IC’s
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Iout Specs
• Below is a typical Iout load behaviour
Maximum
current
Over current trip
point
Iout
di/dt rate
I step
Minimum
current
Time
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Question
What happens to current in COUT if IOUT’s frequency
>> than the bandwidth of the converter ?
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Answer
• Normally, the ripple current in Cout is the same as the inductor
current
• If the load is switching faster than the bandwidth of the
converter
– the ripple current in Cout is due to Iout (load shift).
– the converter will not respond to the load changes so the current it
delivers will be the average of Iout
• The ripple current in Cout due to Iout may be significantly
higher than that due to the inductor current
• This condition occurs with most modern micro-processors
when executing certain software
• Local decoupling caps help solve this problem
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Design For Safety
Standards, Certificates
& Regulations
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Standards, Certificates & Regulations
A power supply has many standards and regulations to meet
Only the major ones will be covered
Safety
Corporate
Standards
Vin
Iin
Time
EMC
Features
Robustness
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Safety - http://www.i-spec.com
• Many countries have their own safety agencies
– US has Underwriters Laboratories
– Canada has Canadian Safety Agency
– Europe has Conformity European Mark
• To sell a product and/or to be protected from liability, the
product must be approved by a safety agency
• Most countries follow standard IEC-60950
The Product Designer's “on-line guide”
to compliance with the
International Safety Standard for
Information Technology Equipment,
IEC 60950
i-Spec also covers national standards based on IEC
60950, including EN 60950, UL 1950/CSA C22.2
950, AS/NZS 3260.
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Safety
• For example:
– A product that will operate from 240VAC requires that the
primary-secondary spacing be greater than 8mm
– The FR4 Card must meet UL 94V-0 standard for flammability
• There is even safety consideration for battery-operated
equipment when the battery fails short
• To obtain safety approval
– The product must be taken to an agency for testing
– Performed by a person within the company who has been
certified by the safety agency
• Approval by one safety agency will be accepted by others
– To obtain CE and CSA approval for a power supply that has been
approved by UL, only the test report need be shown
• Many labs will do all the required testing and the paper work
for a fee
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Electro-Magnetic Compatibility (EMC)
Electro-Magnetic Compatibility - (Love / Hate)
EM Emission - EM Susceptibility
• EM emission limits are required by law for products
– For the US, FCC part 15
– For Europe, CSIPR
– Both are similar
Class A
typically for industrial
equipment
Class B
typically for commercial / home
equipment
Class B is 10dB more stringent
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Conducted or Emitted
<30 MHz FREQUENCIES >30 MHz
• Noise is measured through a
device called a LISN on the
AC cord
• The noise is measured with
an antennae 10 meters
away
• LISN – Line Impedance
Stabilizer Network is a set
of filters that filters signals
above 60Hz to a spectrum
analyzer
• All testing is done in a
shielded chamber
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• Certifications must come
from approved sites
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Why 30 MHz?
• Question
– Why are measurements done through the line cord at <30Mhz
and with an antennae at 10m for >30Mhz?
• Answer
The speed of light, c, is 300 x 106m/s
At f = 30Mhz (30 x 106/s), the wavelength (=c/f) is 10m
– At frequencies <30Mhz, the emitted noise is carried out in
the wiring which is not an effective antennae
– At frequencies >30Mhz, emitted noise is radiated from the
line cord and circuit wiring since these now become effective
antennas
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Susceptibility
Lower Susceptibility is increased Robustness
• These standards help the user design a product that will last a
reasonable time in every day environments.
• There are no requirements to meet any of these standards.
However, they contain a wealth of experience.
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Susceptibility - Circuit Card Effects
The Institute for Interconnecting and Packaging
Electronic Circuits developed standards for the
packaging of products
• For example
– For connectors, FR4 cards and sheet metal
– Spacing between primary to secondary wring on a FR4 card is
well defined in safety guidelines
– IPC defines the spacing between primary-to-primary and
secondary-to-secondary wiring
– If the primary-to-primary spacing is reduced below the IPC
guidelines, arcing can occur
• There is no facility to test against the IPC spec.
• This is left up to the designer
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Susceptibility - AC Utility Effects
The AC utility line has surges and transients
• Surges are caused by abrupt load changes and “bank”
switching
• Transients are caused by lightning strikes and line faults.
• IEC 801-4 and IEC801-5 provide test procedures that ensure
your product survives most cases
• These tests can be performed by the designer with the right
equipment or by outside labs
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Susceptibility - Electro-static Discharge
Products must also be protected or withstand
electro-static discharges (ESD)
• These occur when products are physically handled
• IEC 801-2 provide test procedures to ensure your
product survives most cases
• These tests can be performed by the designer with the
right equipment or by outside labs
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Susceptibility - ElectroMagnetic
EM Susceptibility tests how sensitive a product is
to EM emissions
• The product should behave as expected with EM
fields up to a certain strength
• The standards for this are
– IEC 810-3 for radiated susceptibly
– IEC 810-6 for conducted susceptibly
• Testing for this is usually performed in EM shield
chambers, same place as for FCC approval
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Corporate Standards
Corporate standards are policed within the company
• Corporate Standards should be all encompassing
– They can toughen existing requirements, such as IPC
guidelines
– They can be guidelines on how a product should be designed
• Topology A is chosen over topology B
• SMT vs. PTH
– They can be guidelines on how a product looks
• Placement of labels
• Color of products
– They can be guidelines on de-rating of components
• Some product specs will cite MIL-217F or Bellcore
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Corporate Standards - Features: ENERGY STAR
• Features are specifications that make a product more
valuable
• Some features later become requirements
• ENERGY STAR
– A “feature” developed by the US-EPA
– Products must reduce their power consumption
significantly for a period of time or when not in use,
known as sleep mode
– These tests can be performed by the designer with the
right equipment or by outside labs
The guideline for computers can be found at
http://www.epa.gov/nrgystar/purchasing/6a_c&m.html#specs_cm
© 2006 DCHopkins
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Corporate Standards - Features: PFC & THD
Low Power Factor and Low THD apply to
AC off-line supplies
• In US, still a feature
• In Europe, this has become a requirement
• This is an example of a feature that has become a
requirement
• The standard for this is IEC-555
• This test can be performed by the designer with the
right equipment or by outside labs
© 2006 DCHopkins
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Choosing the
Correct Topology
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Linear Regulators
• Switch is used as programmable resistor
• Fast dynamic response
• Minimal filtering
• Poor efficiency
• Relatively large with heat sink
PL = (VIN - VOUT) * IOUT
dc source
(VIN)
© 2006 DCHopkins
Load
(VOUT)
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Switchmode Regulators
• Switch is used as a chopper
• Dynamic response depends on switching frequency
• Requires filtering
• High efficiency
• High density
PL : steady state + switching
dc source
(VIN)
© 2006 DCHopkins
chopper
(fT)
filter
(fF)
load
(VOUT)
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Demystifying the Circuits - Duality
Using Simple principles of
Duality
Duality
Current is voltage; Voltage is current
L is C; C is L
R is R is R
Series is parallel; Parallel is series
Transistor is diode; Diode is Transistor
Open is closed; Closed is open
© 2006 DCHopkins
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Demystifying the Circuits – Non-isolated
dc
source
dc
source
load
Buck
DUALITY
load
Boost
CASCADE
dc
source
load
Buck/Boost
© 2006 DCHopkins
DUALITY
not covered
Cuk
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Demystifying the Circuits – Conversion Ratios
Buck Regulator
(Step-down converter)
Boost Regulator
(Step-up converter)
VOUT
=D
VIN
VOUT
= 1
VIN
1-D
Buck/Boost
(Up/down converter)
VOUT
-D
=
VIN
1-D
© 2006 DCHopkins
D: duty cycle of switch
TON
TPERIOD
D=
TON
TPERIOD
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Demystifying the Circuits – Transformer Isolated
• •
Buck/Boost
Isolated
load
dc
source
Flyback
• •
Buck
Isolated
load
dc
source
Forward
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Demystifying the Circuits – Bridge
Half Bridge
dc
source
LOAD
Buck derived topologies
Full Bridge
dc
source
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LOAD
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Demystifying the Circuits – Resonant Bridge
Series Resonant
dc
source
LOAD
Parallel Loaded
Series Resonant
dc
source
LOAD
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Partially Resonant Topologies
• Discontinuous-Resonant topologies known as
– Zero-Voltage Switched circuits
– Zero-Current Switched circuits
• Resonant Transition topologies
– Zero-Voltage PWM topologies
• Characteristics:
– Uses internal parasitics for nearly lossless switching
– Fairly involved design approach
– Next level of sophistication
Beyond this course
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Knowing Where
Disaster Can
Strike
Do you have the “knack?”
© 2006 DCHopkins
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Disaster is Only Nanoseconds Away
Inductive Switching 101
or Understanding the Waveforms
You can be a rich power
electronics designer too! It is
all in battling Mother Nature.
She likes continuity and easy
flow, e.g. Sinewaves,
exponentials and Gaussians.
We give her
v=L*di/dt and
i=C*dv/dt
© 2006 DCHopkins
Buck-Boost
Load
Buck Load
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Inductively Induced Voltage
• Power Mosfets can switch 10A in 5ns
• Internal lead inductance could be 5 nH each terminal
v=L*di/dt, or lead inductance creates a 20 V spike.
Lower the
Mosfet rating,
the faster the
device
© 2006 DCHopkins
All parameters
work against
you
Thank you,
Mother Nature
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Inductive Switching - Ideal Circuit
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Inductive Switching - Ideal Circuit, Real Switch
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Inductive Switching - Diode Inductance
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Inductive Switching - Diode Capacitance
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Inductive Switching - Circuit Inductance
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Inductive Switching - Slower Switch Transition
Vds is worse if Fet is slowed down. Suspect something
with model. Everything else ok.
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Inductive Switching - Snubbing transients
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Characterizing
Power
Components
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Semiconductors
• Zeners
– typical operation
– transient suppression
• Diodes
• Rectifiers
• Fast recovery
• Ultra-fast recovery
– Reverse Recovery Charge
– Forward turn-on delay
– Package parasitics
• Varistors (MOVs)
– clamps (not crowbars)
– should thermally fuse
© 2006 DCHopkins
• Transistors
– Power Mosfets
• vertical structure
– IGBTs
– “TopSwitch”
– modules
– Bipolars
• Triggered semiconductors
– SCR’s
• crowbar applications
• Phase-controlled bridges
• high power
– Unijunctions
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Do's and Don'ts of Using MOSFETs
• Be Mindful of
– Reverse blocking characteristics of the device
• A vertically conducting device
– Handling and testing power HEXFETs
– Unexpected gate-to-source voltage spikes
– Drain or collector voltage spikes induced by switching
• Pay attention to circuit layout
•
•
•
•
Do not exceed the peak current rating
Stay within the thermal limits of the device
Be careful when using the integral body-drain diode
Be on your guard when comparing current ratings
© 2006 DCHopkins
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MOSFET Gate Drive Characteristics
• Gate drive -vs- base drive
– Driving HEXFETs from linear circuits
– TTL gate drive for a standard HEXFET?
– The universal buffer
• The most important factor in gate drive: The impedance of the
gate drive circuit
• Gate drive approaches
– Simple and inexpensive isolated gate-drive supplies
• Optocouplers, pulse transformers, choppers, photovoltaic
generators
– Bootstrap gate-drive supply
• Maximum gate voltage and the use of Zeners
• Driving in the MHz? Use resonant gate drivers
– Power dissipation of the gate drive circuit is seldom a problem
© 2006 DCHopkins
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Paralleling MOSFETs
• General Guidelines
– Steady State Sharing
• The inherent positive temperature coefficient provides dc
(steady state) sharing while in the on-state!
– Dynamic Sharing at Turn-On
• Requires close matching of gate-threshold voltages
• Avoid gate resonance by using ferrite gate beads (few nH)
• Must have matched inductive paths
• Clamping MOSFETS are beneficial
– Dynamic Sharing at Turn-Off
• Requires some matching of gate-threshold voltages
• Requires close matching of “Miller Capacitance” path
• Must have matched inductive paths
© 2006 DCHopkins
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Diode Reverse Recovery
Recovery produces sharp current transients and EMI
tn
IF
ta
IF
tb
IRR
tn
ta tb
IRR
Abrupt Recovery
Soft Recovery
Buck Load
© 2006 DCHopkins
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Safe Operating Area - the holy grail
SOA combines transient and thermal limits
ID
Steady state (DC) limit
Fusing current
Thermal path limit
MAXIMUM
POWER AREA
© 2006 DCHopkins
Transient
thermal limit
Breakdown
limit
VDS
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Capacitors - Circuit Equivalent
• Ceramic
– high frequency
– sensitive to thermal transient
ESL
• Tantalum
ESR
– polarized, also organic leads
– high energy density
• Electrolytic, also oscon
C
leakage
– polarized
– highest energy density
• Equivalent Circuit
– R, L, C
– limited internal temperature
from “RMS heating,” i.e.
current ripple
© 2006 DCHopkins
Staged for reducing ESR
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Magnetics - Circuit Equivalent
• Transformers
– Leakage is loss of coupling from primary to secondary
– Skin effect is determined by copper and core magnetic fields
• litz wire and foil help in high-frequency designs
– Thermal hot-spots of most concern:
• from high flux densities in core
• from eddy current losses in core and wires
• potting can trap heat
Rp
Xp
Xl
Xs
Cs
Approx.: Xl = 10 *Xp
© 2006 DCHopkins
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The Dual Faces of
Power MOSFETS
Getting the heat out with
Synchronous Rectification
© 2006 DCHopkins
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Synchronous Rectification - Output Drop
As voltage requirements from micro-processor’s and logic
drop, efficiency becomes a problem
• For output voltages < 3.3V, the best case efficiency can be
approximated by
Vout

x100%
Vout  Vd
Vd is the voltage drop due to the output diodes
dc
source
load
Boost
© 2006 DCHopkins
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Synchronous Rectification - Efficiency
• The best Schottky diode voltage is 0.25V and high current Schottky
diodes are as high as 1V
• For example, 1V@100A converter with 0.5V for Vd, can have an
efficiency of 67% best case
• For every 100W out, 50W is wasted as heat!
• Other advantages for increasing efficiency
–
–
–
–
Greater utilization of AC feeder capacity
Reduced electrical bill for the customer
Increased reliability with less thermal issues
More “green” friendly
© 2006 DCHopkins
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Synchronous Rectifiers
• Solution is to use Synchronous
Rectifiers
• Replace or parallel the output
diode with a low Rds-on Fet
• For this to work, the Fet must turn
on when the current is in the
direction of the diode
• I x Rds-on < Vd
I
• Efficiency of 90% can be achieved
with 1V@100A power supply!
© 2006 DCHopkins
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Synchronous Rectifiers - Notables
What to watch out for
– If the current reverses and the Fet is on, you have a short-circuit
condition across, usually, a transformer
– Timing is critical
– The MOSFET body diode may come on
– Placing a Schottky diode in parallel with the body diode will not,
in all cases, reduce power loss – Ramp down effect
– Very low Rds-on Fets require a large amount of gate drive energy
• For example, a 1V@100A converter, 2% efficiency loss to
gate drives is not uncommon
© 2006 DCHopkins
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Synchronous Rectifiers - Parallel Modules
– Some PS can source and sink current
– At light loads, this could happen with parallel modules
–
Circulating current can be as high as several hundred amps
–
Solution is to shut sync rect off at light loads
© 2006 DCHopkins
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The Circuit is a
Component
Insights into Power
Packaging
© 2006 DCHopkins
www.DCHopkins-Associates.Com
Electrical v. Physical Circuits
Power electronic circuits [PHYSICAL CIRCUITS] condition
and convert many energy forms!
+
Electric
Magnetic
Electromagnetic
Thermal
Mechanical
Chemical
Photonic
We do not do ONLY electrical designs
© 2006 DCHopkins
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Typical Electrical Structure
Lead Inductance
Finite resistance
Skin Effect
Inter-Conductor Capacitance
Coupled Capacitance
© 2006 DCHopkins
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Conductor Resistance -Sheet Resistance
R= r l
l
/ (t × w)
t
let l / w = 1 = “one square”
l
w
Rsheet = r / t [ W / sq. ]
A corner is 0.559 squares
© 2006 DCHopkins
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Conductor Thickness
“1 oz. copper” is weight for one square foot
Thickness and Resistance from Common Conductors
Metal
Al (6061)
Cu (110)
Gold
Silver
Tin
© 2006 DCHopkins
Density Resistivity Thickness (mils)
(gm/cc) (Wcm) 1oz 2oz 3oz
2.72
2.83
4.41 8.83 13.24
8.94
1.72
1.34 2.68 4.03
19.3
2.2
0.62 1.24 1.87
10.19
1.59
1.18 2.36 3.53
7.29
11.5
1.65 3.29 4.94
DC Resistance (mWsq)
1oz
2oz
3oz
0.252 0.126 0.084
0.504 0.252 0.168
1.393 0.696 0.464
0.531 0.266 0.177
2.75 1.375 0.917
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DC Power Supply Example - Output Conductor Resistance
Terminal
Calculate the voltage drop and power
loss of the output leads for a 5V, 100A
supply. Consider 1oz., 2oz. and 3oz.
copper conductors.
No. of squares for both sides is:
Squares =
=
For 2oz. copper
Rtotal =
=
Vleads =
Pleads =
?
© 2006 DCHopkins
~1
Cap
~.22
Terminal
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DC Power Supply Example - Output Conductor Resistance
Terminal
Calculate the voltage drop and power
loss of the output leads for a 5V, 100A
supply. Consider 1oz., 2oz. and 3oz.
copper conductors.
No. of squares for both sides is:
Squares = 2(1 + 0.56 + 0.56 + 0.22)
= 4.68 sq.
For 2oz. copper
Rtotal =(0.252 mWsq) (4.68 sq)
=1.18 mW
Vleads = (1.18 mW) (100 A)  118mV
or 2.8%
Pleads = (118 mW) (100 A) 2 = 12 W
© 2006 DCHopkins
~1
0.56
0.56
Cap
~.22
0.56
~1
0.56
Terminal
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Output Conductor Resistance
Cu "thickness"
Resistance (mOhm)
Voltage Drop (mV)
Power Loss (W)
© 2006 DCHopkins
1oz
2.8
280
28
2oz
1.4
140
14
3oz
0.7
70
7
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Coupled Capacitance
• Substrate Coupling
Example:
Conductor #1: 100mils x 1 inch
Conductor #2: 400mils x 1 inch
Substrate: ceramic loaded polymer, 3 mils thick, er = 6.4
Find Capacitance:
C=
© 2006 DCHopkins
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Coupled Capacitance
• Substrate Coupling
Example:
Conductor #1: 100mils x 1 inch
Conductor #2: 400mils x 1 inch
Substrate: ceramic loaded polymer, 3 mils thick, er = 6.4
Find Capacitance:
C1 = 47.9 pF, C2 = 192 pF
C = C1 series with C2 = 38.3 pF
© 2006 DCHopkins
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Ground Coupling
Example: Switching current
coupled into header from FET drain.
Vd
FET: 400mils2, tf = 20 ns
(+20 mil conductor periphery)
(+100 mils2 drain bond pad)
(+200 mils x 400 mils drain lead)
Substrate: Al2O3
25 mils thick, er = 9.4
Voltage source: 425 Vdc
continued
© 2006 DCHopkins
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Ground Coupling (continued)
Bond Pad
100mils2
Find Capacitance:
?
20mils
400mils2
Find switching current:
i = C (dV/dt )
Drain Lead
100x200mils
i=
© 2006 DCHopkins
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Ground Coupling (continued)
Bond Pad
100mils2
20mils
• Find Capacitance:
A = 0.284 in2 = 183 mm2
d = 25 mils = 0.635 mm
Then: C = 24 pF (d-s Cap)
• Find switching current:
i = C (dV/dt )
= 24 pF (425/20ns)
i = 0.51 A
© 2006 DCHopkins
400mils2
Drain Lead
100x200mils
For ceramic loaded polymer
C = 136 pF and i = 2.9 A
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Inductive Effects Non-Transmission Line Mode
•Self Inductance of Conductors
Minimum is non-coupled in free space
Xe ( W  sq ) = Ld Gl
Ld = Rd = ( 2 s d )-1
Gl = (sinh n  sin n ) / ( cosh n  cos n )
nt/d
t is the thickness (m)
d  (  f  s )1 2, skin depth
s is conductivity in (s/m)
f is frequency
 is permeability ( 0  4  x 10-7 H/m)
© 2006 DCHopkins
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Inductive Effects
Example - High Frequency Lead Inductance
Calculate the per-square self-inductance of a 1oz, 2oz and 3oz
copper lead needing to conduct a 1MHz signal.
For 1oz copper:
d  66.0 m, n  t / d  0.516
Ld  0.130 mW  sq, Gl = 0.172
Xe = 22.4 W  sq, or Le = 3.57 pF / sq
Note: max selfinductance =
( 4 fs   ) -1 / 2
© 2006 DCHopkins
Self-Inductance, Cu @ 1MHz
Xe ( W  sq )
Le ( pH / sq )
1oz
22
3.6
2oz
45
7.1
3oz
67
11
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Inductive Loops
Non-ferrous headers
Aluminum
Copper
Si C
Al Si C
Ferrous headers / substrates
Invar ( 64% iron, 36% nickel )
Kovar ( 54% iron, 29% nickel, 16% cobalt)
Ferrite (substrates)
Porcelainized steel (substrate)
© 2006 DCHopkins
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Temperature as the Culprit
Vibration
20%
Temperat
ure
55%
Dust
6%
Humidity
19%
© 2006 DCHopkins
Failure Rate ( /105 runs)
Primary Causes of failure in avionics equipment
Junction Life Statistics
150, 0.2
100, 0.05
50, 0.005
Junction Temp (C)
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Thermal Issues
Factors affecting DT
Convection/conduction in medium
Chip size
Chip attach
Heat spreader
Conductor type and thickness
Substrate type and thickness
Substrate attach
Heatsink
© 2006 DCHopkins
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Rule of Areas (Hoppy’s Rule)
Power Supply
  P0 / P i , Pl = P0 ( 1 -  )  
Load
P0, zero % efficient electrically
heat
heat
For first-level type packaging
(e.g.. chip and wire) the thermal
area densities are equal:
Pl / Aps = PL / AL
© 2006 DCHopkins
Pi
, Pl
P0
PL
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Rule of Areas (continued)
For thermal enhancements (e.g.
thermal vias) a Thermal Density
ratio, TDr , is defined
TDr = ke, l / ke, ps
where ke is an equivalent thermal
conductivity for that area.
Aps/AL
1
TDr=1
0.8
0.6
0.4
0.2
Then
TDr ( Pl / Aps ) = PL / AL
Aps / AL = TDr ( 1  1 )
© 2006 DCHopkins
0
0.5
0.6
0.7
0.8
0.9
1

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Thermal Resistance Model - 1D
Rq = 1 t
k A
1 l
R =
s A
i
q
Dv
DT
R
Rq
Chip
Solder
Spreader
Conductor
Substrate
Attach
Baseplate
Attach
R [W] = v[V] / i [A]
R [oC/W] = T [oC] / q [W]
Heatsink
© 2006 DCHopkins
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Comparative Thermal Resistances (°C/kW cm2)
Material
Silicon (Si)
Solder (95Pb-5Sn)
Molybdenum (Mo)
Alumina (Al2O3)
Aluminum
Nitride (AlN)
Beryllia (BeO)
Aluminum Silicon
Carbide (AlSiC)
Aluminum (Al)
Copper (Cu)
Polymer Ceramic
Glass Epoxy (FR-4)
Thermal Grease
© 2006 DCHopkins
Thermal
Conductivity
(W/m °C)
84
63
146
2026
170230
Typical
Rq/cm2
(°C/kW cm2)
42
16
17
244
37
Thickness
(mils)
14
4
10
25
240320
170
26
-
25
25
-
240
393
3.2
0.21.7
1.1
2.6
476
3000
924
4 (3oz)
6
20
4
DT(°C)
IGBT
@0.2kW/cm2
8.4
8
3.4
49
5.2
0.52
95
600
185
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Example Structure
Si
width
Material (mm)
Si
Solder
Cu
Al2O3
Al
AlSiC
10.2
10.2
12.7
15.2
15.2
15.2
k
depth thick
(mm) (m) (W/m °C)
10.2
10.2
12.7
15.2
15.2
15.2
360
102
204
635
51
1.27*
84
63
393
26
240
170
DBC
Al2O3
Al
AlSiC
* in mm
© 2006 DCHopkins
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One-Dimensional Model -Using Bulk Dimensions-
Rq = (t / A) / k
Si
t = thickness, A= width x depth
DBC
layer t (m) w(mm) w’(mm) D(mm) D’(mm) Ae(mm2) Rq(°C/W)
Si
360 10.2
Solder 102 10.2
Cu
203 12.7
Al2O3 635 15.2
Al
51 15.2
AlSiC 1.27* 15.2
10.2
10.2
10.4
11.0
11.0
12.3
10.2
10.2
12.7
15.2
15.2
15.2
10.2
10.2
12.7
15.2
15.2
15.2
103
103
107
121
122
152
0.041
0.016
0.003
0.105
0.001
0.002
Al2O3
Al
AlSiC
*in mm
Rq, total = 0.198 °C/W
© 2006 DCHopkins
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- ” 45° ” Spreading Angle Assumption : For an isotropic material, heat flows laterally at the same
rate it flows vertically.
Hence: A = (Wu + t)(Du + t)
Rq = (t / A) / k
Material
Si
Solder
Cu
Al2O3
Al
AlSiC
width
(mm)
10.2
10.2
12.7
15.2
15.2
15.2
depth
(mm)
10.2
10.2
12.7
15.2
15.2
15.2
360
102
204
635
51
1.27*
Rq = 0.232° C/W
© 2006 DCHopkins
Si
thick
k
(m) (W/m °C)
84
63
393
26
240
170
DBC
Al2O3
Al
* in mm
AlSiC
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- Adjustable Spreading Angle Thermal interaction of layers changes the thermal spreading
angle, a
an = tan-1(kn / kn+1)
A’n = [W’n + 2tn tan (an)]
Rq,n = (tn / A’n) Kn
DW > tn tan (an)
Asi
Acu
Example Spreading Angles
Composite
Material
Spreading
Angle in *
a2
a2
Acer
DBC* on Al2O3
DBC* on BeO
Cu* on Fr-4
AlSiC* on Al
© 2006 DCHopkins
85°
57°
89.8°
30°
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Adjusted Spreading for Structure
Layer Angle (°) W’(mm) D’(mm) A’(mm2) Rq (°C/W)
Si
Solder
Cu
0
0
86
Al2O3
Al
AlSiC
6.2
55
30
10.2
10.2
16.0
(12.7)
12.8
13.0
14.5
10.2
10.2
16.0
(12.7)
12.8
13.0
14.5
104
104
--107
165
169
209
Rq = 0.290° C/W
© 2006 DCHopkins
0.041
0.016
--0.003
0.148
0.001
0.036
Si
DBC
Al2O3
Al
AlSiC
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Presentation Goes Off-Line
We break to another topic.
See supplemental material.
Review of packaging
paraphernalia
© 2006 DCHopkins
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Design
Approaches
and Tools
© 2006 DCHopkins
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In the Best of Designs...
Compliments of Celestica, Inc.
The Good
the Bad and
the Ugly
© 2006 DCHopkins
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Presentation Goes Off-Line
We break to another topic.
See supplemental material.
Review of physical hardware
Compliments of Celestica, Inc.
© 2006 DCHopkins
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Simulating Reality
Our best guess at
Mother Nature
© 2006 DCHopkins
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Overview on Design Tools
Ease of Use
SPICE based
or StateSpace
Simulator
Webench, SMS,
SwitcherCAD
Pspice, AWB, SIMetrix, Simplis
Pisces, Fielday,
Ansoft
Cost $$$
Design Programs
for Power Supplies
FEM
Based
Simulators
Device
Component
Physics
Modeling
Circuit
Simulation
Specific
Circuits
Physical Level
© 2006 DCHopkins
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FEM Design Tools
Expensive and require significant learning
• Pisces and Fielday,
IBM tools, simulate
semiconductor
devices at the
electron level
• Ansoft simulator
models electromagnetic devices
with FEM
– On the right is a
gapped ferrite core
showing the flux
lines
See additional Ansoft foils
© 2006 DCHopkins
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SPICE Design Tools
Easy to use but requires circuit
design experience and $$$
• Pspice1, AWB1 and
SIMetrix2 use time
differentials for solving
circuits.
• Good for modeling
electrical circuits
• Transistor and op-amps
are modeled as
equivalent circuits
• On the right is a simple
circuit and waveform
from Pspice
1=Cadence, 2=Simetrix inc
© 2006 DCHopkins
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SPICE Design Tools - Limitations
When simulating switchmode supplies, SPICE has limitation
• Need to simulate long times to look at control loop
behavior in milliseconds, yet ...
• SPICE will calculate in nanoseconds because of the time
domain calculations
• One solution is to use “Average Models,” where the
switching waveform is averaged out.
• Models require mathematical definitions and a good
understanding of the subject
© 2006 DCHopkins
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State-Space Design Tools
• Another solution is to
use a state-space
simulator such as
Simplis1
• Simplis calculates
based on the topology
and only at the
switching points
• Simulation speed for
switchmode power
supplies is improved
up to 100X
• You can enter the
circuit as is
1=Transim Corp
© 2006 DCHopkins
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Webench Design Tool - www.webench.com
• Webench is a design
tool from National
Semi. in conjunction
with Transim Corp.
• Webench helps you
pick the IC, simulate
and build.
• Within Webench is
Websim which uses
Simplis as the
simulation engine
• Webench is a Web
based tool
• Very easy to use and
free but not flexible
© 2006 DCHopkins
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SMS Design Tool
Switcher Made Simple (SMS) is a PC program from National
Semi., in conjunction with Transim Corp
• The program
– helps the user
select the
appropriate
controller IC
– designs and
selects
components
– easy to use but
not flexible
– free
• Great for the
novice that
needs a quick
power supply
design
© 2006 DCHopkins
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Input Filtering
(Not selective hearing)
© 2006 DCHopkins
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Input Filter
• Why is an input filter needed ?
– Reduce ripple current from the PS
– Prevent filter oscillation
– Reduce the di/dt of the load reflected back to the input
© 2006 DCHopkins
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Input Filter
Why is an input filter needed ?
– Reduce ripple current from the PS
– Prevent filter oscillation
– Reduce the di/dt of the load reflected
back to the input
• Ideally, Iin should be a clean DC
current
• There will be the ripple current, Irip,
from the PS switching stage
• To reduce the input ripple, use an L-C
network on the front-end of the power
supply
• The resonant frequency << Fsw
Irip
Iin
Time
© 2006 DCHopkins
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Input Filter
• If the resonance of L1,C1 is around Fsw of the PS, a large
amount of current can oscillate between L1 and C1
• The amount of current depends on the Q of L1 and C1
• Very common if L1 is just the board trace between the PS and
the Vin source
• This oscillation can depend on the length of board trace!
• Adding an inductor will lower the resonance and make this
parameter controllable
• If the resonance of L1 and C1 still a problem, dampen it with
an R-C across L1 or use lossy core material for L1
© 2006 DCHopkins
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Input Filter
• Another problem arises if L1 and C1 have a large Q
• Even if the resonance is less than Fsw, this peaking effect can
cause problems with the control loop
• This resonant frequency can show up on the output of the
power supply
• Again, solutions are either an R-C across L1 or use a lossy core
material for L1
© 2006 DCHopkins
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Input Filter
• Another characteristic is reduction of input di/dt during load
transients
– Problems caused in the Vin bus
• Ringing on the board traces
• Vin not able to respond to load change
• Solution: absorb the load energy
– How?
• Large cap on Vin bus – PTH parts on SMT board? No
• Adding more output caps to absorb the energy? Expensive No
• Add second stage filter? Inexpensive SMT parts - Yes
– First filter L1,C1 filters the high-frequency switching
components. Second filter L2,C2 is a low-pass filter to smooth
out the reflected load transient
© 2006 DCHopkins
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Input Filter
Shown is a two-stage filter with input current and load current
Beware of inter-stage oscillations
© 2006 DCHopkins
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A Different
Approach to a
DESIGN
Optimally Selecting Packaging Technologies
and Circuit Partitions Based on Cost and Performance
APEC’ 2000 Conference
John B. Jacobsen and Douglas C. Hopkins
© 2006 DCHopkins
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© 2006 DCHopkins
Depreciation
Production
Cost
Wages
Materials
Cost
Packaging materials
Comp. packaging
(controllable)
Other OH
Packaging Materials
& Production Costs
Standard unit cost
Overhead
Full-Cost Model
Minimum packaged
components
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Centers of Cost
• Materials cost*
• Production cost*
– *Full Cost
• Partitioning cost
• Product business cost (return on investment for
development of one product)
• Company business cost (return on investment for cross
products)
© 2006 DCHopkins
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Centers of Cost (con’d)
• Materials cost represent direct costs of packaging materials.
• Production cost includes factors for wages and product
volume, but are independent of material costs.
• Partitioning cost is incurred for each technology used.
• Full cost combines material costs and production costs.
• Product business cost, i.e. return on investment for
development of one product, is an investment in future
payback. The total cash flow from development until end
of production determines the business costs for a product.
• continued
© 2006 DCHopkins
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Centers of Cost (con’d)
• Company business cost, i.e. return on investment for crossproduct usage, reflects the cost of sub-optimization within
one single product.
– Reusing the same packaging technologies, designs (diagrams)
and even physical circuits (building blocks) across different
products should be measured at the company level. The value
of building blocks becomes obvious through savings in
repetitive development costs and maintenance of function
© 2006 DCHopkins
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Production Cost Dependency by Volume
yr - 2000
700%
Production Cost
600%
500%
400%
Other overhead costs
300%
200%
Depreciation
100%
0%
10k
© 2006 DCHopkins
Wages
32k
100k
Products/Year
320k
1000k
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Cost Variation Within a Technology
Packaging &
Production Costs
Relative Cost
TF module
& leadframe
Packaging Performance:
(electrical, thermal, mechanical
1
0.8
110 SMDs
14 leadet
0.6
FR4
0.4
Functional
integration within
technology
70 SMDs
7 leadet
0
5
10
15
20
25
0.2
0
30
Surface Density
© 2006 DCHopkins
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Relative Cost of Technologies
Packaging Performance:
electrical, thermal, mechanical
1
Packaging &
Production Costs
DBC
TF &
Plated Cu
IMS
Relative Cost
0.8
Performance
Circuit cost by
change in technology
FR4
0.6
0.4
0.2
Hot
Embossing
0
5
10
15
20
25
0
30
Surface Density
© 2006 DCHopkins
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Relative Packaging & Production Cost
Relative to 1 in2 of FR4
a
12
b
10
8
c
6
a
b
c
4
d
Z-strate Cu( 2 layer)
DBC( 0,63 Al2O3 )
FR4 Cu( 4 layer )
FR4 Cu( 2x35um)
Hot Embossing
0
TTF
d
d
leaded auto/10 comp
Substr/in2
Power chip&
wire/10 comp
SMD/10 comp
Integrated res/10 comp
TF multilayer
2
IMS (1 layer on Al)
Relative Cost
14
Substrate Technology
© 2006 DCHopkins
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Relative Production Cost per Technology
Cost/component
120%
100%
80%
60%
40%
20%
0%
Leaded-manual
Leaded-auto Power chip & wire
SMD-auto
Assembly Technology
© 2006 DCHopkins
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THE
END
Thank you for your interest in
DCHopkins & Associates
www.DCHopkins-Associates.Com
© 2006 DCHopkins
www.DCHopkins-Associates.Com