Transcript Memory-Cell Design in Josephson Technology

Memory Designing Using
Josephson Gates
Susmit Biswas
02/07/2006
Outline
 Refreshing Memory
 Memory Circuits
 CMOS Memory Circuits
 Need For New Memory Technology
 Josephson PC Memory
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Previous Work
Josephson Junction
Memory Designing Using Josephson Gate
Performance Evaluation
 Conclusion
Standard Memory Technology
 The Memory Hierarchy
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CPU Registers
L1 Cache (SRAM)
L2 Cache (SRAM)
Main Memory
 SRAM
 DRAM
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FPM DRAM (Fast Page Mode DRAM)
EDORAM (Extended Data Out DRAM )
SDRAM (Synchronous DRAM)
DDR DRAM (Double Data Rate DRAM)
DRAM
 High Density and low power
 but Slower than SRAM
DRAM Performance
(August 2005)
Need For New Technology
 Memory is the main bottleneck now
 Multiprocessor system suffers most
 SIMD and MIMD architecture
 Data hungry
Josephson Memory: Previous Work
 Josephson Junction:
 Discovered and Demonstrated in early 60’s
 IBM till 1983
 Nearly functional 1kBit memory using lead-alloy
 1980s : ETL, NTT using Nb/Al0x/Nb
 1993 : UC Berkeley designed a 4 kBit RAM
 1997 : NEC developed a 4 kBit Memory
 2002 : Hybrid Josephson memory
Looking Back
 1962: Josephson predicted that a sandwich of S-I-S will
show remarkable properties when the insulator is
sufficiently thin ~ 10Å or so
 Current can flow through the junction with no voltage
appearing across the junction until a critical current IJ is
exceeded
 The magnitude of IJ, depends sensitively on magnetic
fields. A voltage Vdc, impressed across the junction leads
to an oscillating supercurrent whose frequency is
proportional to the voltage. The frequency is very high
for even modest voltages (483 MHz/μV).
Josephson Effect
 Two-fluid model of Superconductor: One of the fluids is
the normal fluid, the other the superfluid. Superfluid
consists of paired electrons (Cooper pairs) of equal but
opposite momentum and spin
Josephson Effect
 Bound pairs electrons all lie near the Fermi
energy EF of the normal metal; the resulting
pairs are in an energy state lower than EF by
an amount Δ (binding energy of the pair (per
electron)
 As T becomes less than Tc, pairs begin to
form and condense into the superconducting
state
 At V = 2 Δ /e the tunneling current increases
sharply (with +∞ slope)
 For V >> 2 Δ/e the current increases linearly
with V
Josephson Junction
 Josephson Effect:
In superconducting state of certain metals,
electrons are attracted by each other and form bound pairs, called
Cooper pairs. When these pairs of electrons tunnel through a thin
insulating barrier placed between two superconductors, the whole is
called Josephson junction.
Josephson Junction Characteristics
 Control currents Ic,
 Josephson threshold Im.
 Gate current Ig,
I-V Curve
Threshold Curve
Josephson Junction As Memory
 Consists of a loop with three Josephson junctions in
series that encloses a magnetic flux Ф driven by an
external magnet.
 The loop may have multiple stable persistent current
states when the enclosed magnetic flux is close to half a
superconducting flux quantum Ф
Ф = h / 2e
 System has two stable states
 ‫׀‬0› and ‫׀‬1› with opposite
circulating persistent currents
Josephson Junction As Memory ( cont.)
 Operated by resonant microwave modulation of the
enclosed magnetic flux by a superconducting control line
on top of the qubit, separated by a thin insulator.
 The state of a bit (0 or 1) depends on the sum of the
external magnetic flux generated by the circulating
currents on the surrounded loops:
 0 if magnetic field is < 1/2 Ф
 1 if magnetic field is > 1/2 Ф
 The state of the system is the superposition of all the
states generated by the circulating current in each loop.
Josephson Junction As Memory ( cont.)
 Combining several junctions results in different gates
e.g. inverter
 Can be designed in two ways
 coupling two superconductive loops directly through
magnetic interference
 Coupling two loops through a superconductive flux
transporter
Josephson Junction As Memory ( cont.)
 Stronger interaction between the PC loops and better coupling to
each other with the facilitation of transporter
 But!
 Coupling between neighboring loops makes it difficult for long-range
communication
 Solution
 Transporter: fast data propagation
Josephson Junction As Memory ( cont.)
NMV Gate can serve as NAND, NOR and NOT gate by setting
instruction bits.
Not Majority Vote (NMV) Gate
Memory Designing Using
Josephson Gate
Memory Designing Using
Josephson Gate (cont.)
 A memory cell can not be refreshed by either a row or a
column addressing line independently
 the addressing lines are designed in such a way that the
states of other cells in the same column are suppressed
during reading, the selected one gets the bit from its
adjacent memory cell, without interacting with its
neighbors in the same column.
Performance Evaluation
 Pros:
 Speed: 750GHz for single asynchronous cells and up to 320GHz for LSI
devices
 Low power consumption 0.2nanowatt/GHz per pulse and
0.1mW for LSI devices
 Simple fabrication technology : lithography
 Cons:
 Low density
 Operational temperature <20K
Performance Evaluation (cont.)
Comparison of projected 2.5μm technology Josephson NDRO and DRO chip
designs with advanced silicon memories having comparable line widths.
Conclusion
 Josephson memory can become more and more
popular because of its speed and low power
characteristics
 Designing larger memory is difficult
 Low density
 Limitation of fabrication technology
References
1. “Novel Computing Architecture on Arrays of Josephson
Persistent Current Bits” : Jie Han, Pieter Jonker [Proc.
MSM 2002 ]
2. “Memory-Cell Design in Josephson Technology” :
Hans H. Zmpe [IEEE Transactions On Electron
Devices, VOL. ED-27, NO. 10, OCTOBER 1980]
3. “570-ps 13-mW Josephson 1kbit NDRO RAM” :
Shuichi Nagasawa et. al. [IEEE Journal of Solid-State
Circuits, Vol 24, No 5, October, 1989]
References
4. “Design Of A 16-kbit Variable Threshold Josephson
RAM”: I. Kurosawa, [IEEE Transactions On Applied
Superconductivity, Vol. 3, No.l, March1993]
5. “Josephson Type Superconductive Tunnel Junctions
and Applications” : Juri Matisoo [IEEE
TRANSACTIONS ON XAGNETICS, DECEMBER
1969]
6. http://www.lne.fr/en/r_and_d/electrical_metrology/josep
hson_effect_ej.shtml