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Optimizing Static Power Dissipation By
Functional Units in Superscalar Processors
Siddharth Rele, Santosh Pande, Soner Onder, and Rajiv Gupta
Motivation and Research Goals
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ILP distributed non-uniformly throughout a
program.
Functional Units idle for prolonged periods of
time during program execution.
Dynamic power vs static power
Solving The Static Power Problem
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Dual Threshold Voltage
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Power Gating
-Turn Off Devices by Cutting Off the
Supply Voltage
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Turning On Latency
Power Gating
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Using hardware to identify idle regions
-Additional Power Requirements
-Warmup Time
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The Compiler Approach
-Identify Suitable Regions
-Determine the number and type of the
Functional Units to be Turned Off
Issues
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Tolerating the Latency of Turning a Functional
Unit Off
Tolerating the Latency of Turning a Functional
Unit On
Dealing with Variable Length Idle Regions
Architectural Support
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Power Aware Instruction Set
-on and off directives as instruction suffixes
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On and Off Semantics for an OOO Superscalar
Processor
-processor-deadlock and pending-off stage
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Nullifying Spurious Off-On Pairs
Example
mul.off
if(x>10){
wait=0;
while(1){
wait++;
if(wait==1000) break;
}}
mul.on
Compiler Support
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Identify Hot Blocks and corresponding
Functional Unit Requirements
-Access to ILP required when multiple
Functional Units of the same type
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Computing the PAFG
-identifying longer periods of time over
which a functional unit can be turned off
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Place the off and on directives at right places
Experimental Methodology
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Compiler-lcc
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Code Generator-lburg
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Cycle-level Simulator-FAST system
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Benchmarks:
-MediaBench(rawcaudio.c ,rawdaudio.c)
-DSPstones(fir2dim.c,n-real-updates.c, fir.c)
-SPEC95(compress.c)
Experimental Results
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Utlization improved upto 90%
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Performance Degradation less than 1%
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Average Duration for which Units turned off quite
long-several hundred to thousands cycles
Nullification Strategy quite effective for certain
benchmarks.