Low-Dropout Regulator with modest ripple and rugged performance

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Transcript Low-Dropout Regulator with modest ripple and rugged performance

Low-Dropout Regulator with
modest ripple and rugged performance in 180nm
Presentation Outline
INTRODUCTION
LINEAR REGULATOR CONCEPTS
CIRCUIT IMPLEMENTATION
PERFORMANCE ANALYSIS
CONCLUSION
INTRODUCTION
Supplying and conditioning power are the most fundamental
functions of an electrical system.
A loading application cannot sustain itself without energy, and
cannot fully perform its functions without a stable supply
Transformers, generators, batteries, and other off-line supplies
incur substantial voltage and current variations across time and
over a wide range of operating conditions
High frequency switching circuits CPU and DSP circuits utilized
in an application usually load it.
Solution for above mentioned problems is to use a power
converter
Low-Dropout Regulator with modest ripple and rugged performance in 180nm
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LINEAR REGULATOR
CONCEPT OF LINEAR REGULATOR
to sense and generate
a correcting signal
(high voltage gain)
stable dc-bias voltage
impervious to noise,
temperature, and inputsupply voltage variations
pass device to mediate and
conduct whatever load
current is required from the
unregulated input supply to
the regulated output
to sense the output
reacts to offset and cancel effects
of load current, input voltage,
temperature, and an array of other
variations on the output
Low-Dropout Regulator with modest ripple and rugged performance in 180nm
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LINEAR REGULATOR
Transient response of LDO
LDO provide power to low-voltage digital circuits
operating under different modes of operation -voltage transients-cannot be handled by digital
circuits
Factors affecting transient response of an LDO
 The internal compensation of the LDO
 The amount of output capacitance
 The parasitics of the output capacitor
 The faster local feedback n/w responds quicker
to load changes than more complicated
regulator loop
 The additional loop has negligible effects on
dc accuracy as its low frequency gain is kept
well below that of the regulator
 The additional loop also demand little to no
current to have less impact on operational
life of battery
Low-Dropout Regulator with modest ripple and rugged performance in 180nm
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LINEAR REGULATOR
REGULATING PERFORMANCE
LOAD REGULATION
 Steady-state (dc) voltage variations in the output (ΔVOUT) resulting from dc changes in load
current (ΔILOAD) define load regulation(LDR) performance
 Systematic input-offset voltages, which result from asymmetric currents and volt-ages in the
feedback error amplifier, further degrade load-regulation performance
 Even if the LDO were symmetric, its widely variable load would cause considerable voltage
swings at internal nodes, subjecting some of the devices to asymmetric conditions
LINE REGULATION
Line regulation(LNR) performance is a dc parameter and it refers to output voltage
variations arising from dc changes in the input supply
Power-supply variations affect the regulator in two ways
 Directly through its own supply
 Indirectly via supply-induced variations in reference VREF
Low-Dropout Regulator with modest ripple and rugged performance in 180nm
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LINEAR REGULATOR
PROCESS AND TEMPERATURE INDEPENDENT BIASING
 The transconductance of MOSFETs determine performance parameters: small
signal gain, speed and noise.
 It is desirable to bias the transistors such that their transconductance is independent
of process, supply voltage and temperature
Low-Dropout Regulator with modest ripple and rugged performance in 180nm
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LINEAR REGULATOR
Circuit Implementation
PROCESS AND TEMPERATURE INDEPENDENT BIASING
FEEDBACK
NETWORK
BACK NETWORK
FEED
PASS TRANSISTOR
ERROR AMPLIFIER
ERROR AMPLIFIER
FAST REACTING PATHS
FAST REACTING PATHS
Low-Dropout Regulator with modest ripple and rugged performance in 180nm
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Linear Regulator
FIRST FAST REACTING PATH
FIRST REACTING PATH
Low-Dropout Regulator with modest ripple and rugged performance in 180nm
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Linear Regulator
SECOND FAST REACTING PATH
FIRST REACTING PATH
When load current output voltage
The loop results in
which is coupled through cm2 to input of M18
Its operation current
of Vgs of Mf4
leads to in drive for Mp restoring output voltage to its
original value
Low-Dropout Regulator with modest ripple and rugged performance in 180nm
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Linear Regulator
THIRD FAST REACTING PATH
FIRST REACTING PATH
Transistors Mf6-Mf9, Mp, and feedback resistors R1-R2 form the third
self-reacting path
Transistors Mf6-Mf9 constitute an error amplifier
When load current
the output voltage
The output voltage of error amplifier leading to
drive for M18
Gate voltage of Mp thus restoring the output voltage
Low-Dropout Regulator with modest ripple and rugged performance in 180nm
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Linear Regulator
AC ANALYSIS
Parameter
Iload(0mA) Iload(100mA)
Loop gain
62dB
Phase margin
92.61
o
72dB
95.38
o
 The Phase Margin for this load current range
is above 95O, loop-gain is about 72dB

means a stable LDO and enough
gain for a high output voltage accuracy
Low-Dropout Regulator with modest ripple and rugged performance in 180nm
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Linear Regulator
DC ANALYSIS
Parameter
Line Regulation
Load Regulation
Measured
units
1
mV/V
0.162
mV/mA
Low-Dropout Regulator with modest ripple and rugged performance in 180nm
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Linear Regulator
TRANSIENT ANALYSIS
Parameter
Measured
units
OVERSHOOT
97
mV
UNDERSHOOT
144
mV
For a load current pulse of 100mA step with
1s rise and fall times
Low-Dropout Regulator with modest ripple and rugged performance in 180nm
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Linear Regulator
RIPPLE IN OUTPUT VOLTAGE
 It has ripple voltage equal to 0.9 mv

means a stable LDO and
high output voltage accuracy
Low-Dropout Regulator with modest ripple and rugged performance in 180nm
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Linear Regulator
PSRR (POWER SUPPLY REJECTION RATIO)
 It has PSRR of 42dB @1Khz

At low frequencies the PSRR is very high
which results in high suppression of
disturbances from the supply line. In the
higher frequency area of > 1 MHz the
PSRR gets very small and even reaches 0
dB at 6 MHz. This means that a 1 MHz
signal would pass through the regulator
without attenuation
Low-Dropout Regulator with modest ripple and rugged performance in 180nm
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LINEAR REGULATORS
MEASURED PERFORMANCE
Summary of measured performance
Parameter
Measured
Units
0.18
M
Loop gain
@full load current
@zero load current
71
62
dB
dB
Line regulation
0.989
mV/V
Load regulation
0.162
mV/mA
PSRR@1KHZ
42
dB
Δvout(Undershoot)
144
mV
Δvout(Overshoot)
144
mV
Technology
Low-Dropout Regulator with modest ripple and rugged performance in 180nm
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Conclusion
 LDO regulator targeted for SOC applications
(optimized design for performance, board area, and cost)
 LDO is stable for output current in the complete range from 0 to 100 mA
 LDO with high regulation accuracy and fast transient response
Low-Dropout Regulator with modest ripple and rugged performance in 180nm
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REFERENCES
[1] Sai Kit Lau, K.N. Leung, and P.K.T. Mok,“Analysis of low-dropout regulatorTopologiesfor lowvoltageregulation”,inIEEE Conference of Electron Devices and Solid-StateCircuits,December2003
[2] P.Hazucha,T.Karnik,B.A Bradley,C. Parsons,D.Finan,and S.Borkar,”area –efficient
linear regulator withultra fast load regulation,” IEEE J. Solid-StateCircuits, vol. 40,
no. 4, pp.933-940, Apr. 2005
[3] P. Y. Or and K. N. Leung, “An output-capacitorless low-dropout regulator with direct voltagespike detection,” IEEE J. Solid-State Circuits, vol. 45, no. 2, pp. 458-466, Feb. 2010.
[4] T. Y. Man, K. N. Leung, C. Y. Leung, P. K. T. Mok, and M. Chan,“Development of singletransistor control LDO based on flipped voltage follower for SoC,” IEEE Trans.Circuits Sys. I, vol.
55, no. 5, pp. 1392-1401, Jun. 2008.
[5]Texas Instruments, “Fundamental theory of PMOS low-dropout voltage
regulators”,TexasInstruments Inc., SLVA068, Dallas, TX, USA, April 1999.
[6]Chester Simpson, “Linear and switching voltage regulator fundamentals”, NationalSemiconductor
Corporation, Santa Clara, CA, USA, 1995.
[7] Chia-Min Chen,Chung-Chih Hung, “A Fast Self-Reacting Capacitor-less Low-Dropout Regulator,
” IEEE Trans. Circuits Syst. I, pp. 375-378, Sept. 2011
[8]Frederik Dostal, “How and when to use low dropout linear regulators”, Embedded ControlEurope
Magazine, pp. 16-19. March 2004 Issue.
[9]R. J. Milliken, J. Silva-Martinez and E. Sanchez- Sinencio, “Full onchipCMOS low-dropout voltage
regulator,” IEEE Trans. Circuits Syst. I,vol. 54, no. 9, pp. 1879-1890, Sept. 2007.
[10]S. K. Lau, P. K. T. Mok, and K. N. Leung, “A low-dropout regulator forSoC with Q-reduction,”
IEEE J. Solid-State Circuits, vol. 42, no. 3, pp.658-664, Mar. 2007.
[11] D.A.Johns, K.Martin, “Analog Integrated Circuit Design,” John Wiley and Sons Inc, U.K.,246251(1997)
Low-Dropout Regulator with modest ripple and rugged performance in 180nm
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Queries?