A Voltage Scheduling Heuristic for Real

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Transcript A Voltage Scheduling Heuristic for Real

VOLTAGE SCHEDULING
HEURISTIC for REAL-TIME
TASK GRAPHS
D. Roychowdhury, I. Koren, C. M. Krishna
University of Massachusetts, Amherst
Y.-H. Lee
Arizona State University
Motivation
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Energy Constrained Complex Real-Time
Systems are becoming increasingly important
Scheduling – an effective system
management entity to exploit
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Schedule tasks such that energy expenditure is
minimized while still meeting the deadline
Exploit multiple voltage levels provided by
processors to achieve our goal
We focus on applications having tasks with
precedence constraints (can be represented as
task graphs)
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CMOS system equations

slow(v) is the factor by which processor is slower at
voltage v than it is at the reference high voltage vh :
 Threshold voltage is vT
2
v
slow (v) 
vh

 vh  vT

 v  vT



energy_per_cycle(v) is the ratio of energy
consumed per cycle at voltage v to that at vh :
v
energy _ per _ cycle (v)   
 vh 
2
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System Assumptions
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Can run in discrete number of variable voltage levels
 Algorithms are provided for a 2-voltage level
system followed by extensions for systems
supporting multiple voltage levels
A task can only continue if all preceding tasks on
which it depends complete
The energy cost during communication and idle state
in processors is negligible
Voltage switching costs are incorporated within the
worst scale profiling of tasks
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Required Inputs
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Task graph (directed acyclic graph) showing
the precedence constraints between the
tasks after their assignment
Deadline by which the given task set must
finish
Worst case execution profile of individual
tasks under different voltage levels
Distribution of execution profile of each task
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Key issues
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Static scheduling of the assigned Task
Graph
Run-time scheme for dynamic resource
reclamation
Extension to a Multi-Voltage System
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Optimization Problem
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D - Deadline
Si - speed up in time associated with task i
tk - worst case time when all tasks in path Pk
run in low voltage
Constraint equations:
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
s
For path Pk
jPk
Objective function:
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Minimize :
s
j
 tk  D
i
i
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Static Scheduling
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Start by keeping all tasks in low voltage
Start speeding up tasks with highest weight gradually
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We speed up the task with highest weight until some
other task has a higher weight
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Weight of a task is number of critical paths of which that
task is a member
Critical path is a path that currently fails to meet its deadline
under worst case execution profile.
For the tasks with equal weights break the tie by speeding
up the task nearest to a leaf in graph
We continue until all paths meet the deadline
Assign start time and commit time for each task
based on the above voltage scheduling
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Example Graph
Paths
(60) 28
1
1
4
3
2
24
3
(43)
20
2
5
28
1
3
2->4->5
2->4->6
4
6
1->5
2->4->7
16
1
DEADLINE=93
7
3->7
18
2
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Example Graph
Paths
28
1
1
4
2
24
2
2
28
1
3
1->5
2->4->5
2->4->6
4
2->4->7
3->7
20
2
5
6
16
0
7
18
2
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Gantt Chart (Static)
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Run-Time Adjustments
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Each task has an assigned start time and
commit time from static scheduling
If a task can be issued before its statically
assigned start time, we can slow down the
task to save energy
The slow down must still yield same commit
time
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Example Graph
22.88
1
2.5
26.8
11.8
5
2
26.1
3
4
7
6
11.2
14.86
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Gantt Chart (dynamic)
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Key issues
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Static scheduling
Run-time dynamic resource reclamation
Extension to a Multi-Voltage System
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Using Multiple Voltage Levels
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Calculate start time and commit time for
tasks using the static scheduling
Vunique - voltage at which we can finish task
within specified interval without voltage
switching
2 voltage levels are chosen within which
Vunique falls
The switching point is chosen between the
two levels such that task finishes exactly at
commit time
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Simulation Results
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We used systems which support the following
voltage-frequency combinations
Voltage
(V)
Frequency
(MHz)
1
1.75
1000
2
1.40
800
3
1.20
600
4
1.00
466
We use sparse matrix calculation as an
example application
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Energy Saving after runtime
adjustment
Task execution time uniformly
distributed in [A,100] of WCET
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Energy Saving due to Dynamic
Resource Reclamation
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Energy saving over an Infinite
Voltage Levels Algorithm (Zhu et al.)
voltage switching allowed only during context switching
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Energy saving when multiple (4)
voltage levels used instead of 2
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Conclusion
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Considerable energy can be saved by using
our algorithm which takes into account the
relationship among tasks in the set
The algorithm is based on a practical
assumption that processor supports two
voltage levels
We have extended the algorithm for cases
which can use multiple voltage levels though
the gain is not much more significant than
two voltage level case
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Thank You
URL: http://www.ecs.umass.edu/ece/realtime
June 25, 2003